include/cpu/amd/mtrr: rename TOP_MEM(2) and remove workaround

Both AGESA.h and cpu/amd/mtrr.h defined TOP_MEM and TOP_MEM2, but since
it was defined as unsigned long in AGESA.h, a workaround was needed in
cpu/amd/mtrr.h to not have the build fail due to a non-identical
redefinition of TOP_MEM and TOP_MEM2. Just removing the workaround
without reaming the defines isn't trivially possible, since the
stoneyridge romstage.c still ends up including both definitions which
can't be easily worked around. Now all non-vendorcode coreboot code uses
TOP_MEM_MSR and TOP_MEM2_MSR while the vendorcode part uses TOP_MEM and
TOP_MEM2 to avoid this.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ibad72dac17bd0b05734709d42c6802b7c8a87455
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
This commit is contained in:
Felix Held 2023-04-20 14:25:13 +02:00
parent c6889816d8
commit 1c25c63c78
2 changed files with 6 additions and 11 deletions

View File

@ -38,8 +38,8 @@ static const uint32_t msr_backup[] = {
MTRR_PHYS_BASE(7),
MTRR_PHYS_MASK(7),
SYSCFG_MSR,
TOP_MEM,
TOP_MEM2,
TOP_MEM_MSR,
TOP_MEM2_MSR,
};
void backup_mtrr(void)

View File

@ -30,13 +30,8 @@
#define IORRBase_MSR(reg) (0xC0010016 + 2 * (reg))
#define IORRMask_MSR(reg) (0xC0010016 + 2 * (reg) + 1)
#if defined(__ASSEMBLER__)
#define TOP_MEM 0xC001001A
#define TOP_MEM2 0xC001001D
#else
#define TOP_MEM 0xC001001Aul
#define TOP_MEM2 0xC001001Dul
#endif
#define TOP_MEM_MSR 0xC001001A
#define TOP_MEM2_MSR 0xC001001D
#if !defined(__ASSEMBLER__)
@ -68,12 +63,12 @@ static __always_inline void wrmsr_amd(unsigned int index, msr_t msr)
static inline uint32_t get_top_of_mem_below_4gb(void)
{
return rdmsr(TOP_MEM).lo;
return rdmsr(TOP_MEM_MSR).lo;
}
static inline uint64_t get_top_of_mem_above_4gb(void)
{
msr_t msr = rdmsr(TOP_MEM2);
msr_t msr = rdmsr(TOP_MEM2_MSR);
return (uint64_t)msr.hi << 32 | msr.lo;
}
#endif