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Add SPI flash driver

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This driver is taken from u-boot and adapted to match
coreboot. It still contains some hacks and is ICH specific
at places.

Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/997
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Stefan Reinauer
2012-05-10 11:27:32 -07:00
committed by Stefan Reinauer
parent 43105d6a5a
commit 1c56d9b102
19 changed files with 2851 additions and 0 deletions
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81
src/drivers/spi/Kconfig Normal file
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##
## This file is part of the coreboot project.
##
## Copyright (C) 2012 The Chromium OS Authors.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config SPI_FLASH
bool
default n
help
Select this option if your chipset driver needs to store certain
data in the SPI flash.
config SPI_FLASH_EON
bool
default y
depends on SPI_FLASH
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by EON.
config SPI_FLASH_MACRONIX
bool
default y
depends on SPI_FLASH
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by Macronix.
config SPI_FLASH_SPANSION
bool
default y
depends on SPI_FLASH
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by Spansion.
config SPI_FLASH_SST
bool
default y
depends on SPI_FLASH
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by SST.
config SPI_FLASH_STMICRO
bool
default y
depends on SPI_FLASH
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by ST MICRO.
config SPI_FLASH_WINBOND
bool
default y
depends on SPI_FLASH
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by Winbond.
config SPI_FLASH_NO_FAST_READ
bool
default n
depends on SPI_FLASH
help
Select this option if your setup requires to avoid "fast read"s
from the SPI flash parts.

12
src/drivers/spi/Makefile.inc Normal file
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# SPI flash driver interface
ramstage-$(CONFIG_SPI_FLASH) += spi_flash.c
# drivers
ramstage-$(CONFIG_SPI_FLASH_EON) += eon.c
ramstage-$(CONFIG_SPI_FLASH_MACRONIX) += macronix.c
ramstage-$(CONFIG_SPI_FLASH_SPANSION) += spansion.c
ramstage-$(CONFIG_SPI_FLASH_SST) += sst.c
ramstage-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.c
ramstage-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c
ramstage-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c

161
src/drivers/spi/eon.c Normal file
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/*
* (C) Copyright 2010, ucRobotics Inc.
* Author: Chong Huang <chuang@ucrobotics.com>
* Licensed under the GPL-2 or later.
*/
#include <stdlib.h>
#include <spi_flash.h>
#include "spi_flash_internal.h"
/* EN25Q128-specific commands */
#define CMD_EN25Q128_WREN 0x06 /* Write Enable */
#define CMD_EN25Q128_WRDI 0x04 /* Write Disable */
#define CMD_EN25Q128_RDSR 0x05 /* Read Status Register */
#define CMD_EN25Q128_WRSR 0x01 /* Write Status Register */
#define CMD_EN25Q128_READ 0x03 /* Read Data Bytes */
#define CMD_EN25Q128_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
#define CMD_EN25Q128_PP 0x02 /* Page Program */
#define CMD_EN25Q128_SE 0x20 /* Sector Erase */
#define CMD_EN25Q128_BE 0xd8 /* Block Erase */
#define CMD_EN25Q128_DP 0xb9 /* Deep Power-down */
#define CMD_EN25Q128_RES 0xab /* Release from DP, and Read Signature */
#define EON_ID_EN25Q128 0x18
struct eon_spi_flash_params {
u8 idcode1;
u16 page_size;
u16 pages_per_sector;
u16 sectors_per_block;
u16 nr_sectors;
const char *name;
};
/* spi_flash needs to be first so upper layers can free() it */
struct eon_spi_flash {
struct spi_flash flash;
const struct eon_spi_flash_params *params;
};
static inline struct eon_spi_flash *to_eon_spi_flash(struct spi_flash *flash)
{
return container_of(flash, struct eon_spi_flash, flash);
}
static const struct eon_spi_flash_params eon_spi_flash_table[] = {
{
.idcode1 = EON_ID_EN25Q128,
.page_size = 256,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_sectors = 4096,
.name = "EN25Q128",
},
};
static int eon_write(struct spi_flash *flash,
u32 offset, size_t len, const void *buf)
{
struct eon_spi_flash *eon = to_eon_spi_flash(flash);
unsigned long page_addr;
unsigned long byte_addr;
unsigned long page_size;
size_t chunk_len;
size_t actual;
int ret;
u8 cmd[4];
page_size = eon->params->page_size;
page_addr = offset / page_size;
byte_addr = offset % page_size;
ret = spi_claim_bus(flash->spi);
if (ret) {
printk(BIOS_WARNING, "SF: Unable to claim SPI bus\n");
return ret;
}
ret = 0;
for (actual = 0; actual < len; actual += chunk_len) {
chunk_len = min(len - actual, page_size - byte_addr);
cmd[0] = CMD_EN25Q128_PP;
cmd[1] = page_addr >> 8;
cmd[2] = page_addr;
cmd[3] = byte_addr;
printk(BIOS_SPEW,
"PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zd\n",
buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
ret = spi_flash_cmd(flash->spi, CMD_EN25Q128_WREN, NULL, 0);
if (ret < 0) {
printk(BIOS_WARNING, "SF: Enabling Write failed\n");
break;
}
ret = spi_flash_cmd_write(flash->spi, cmd, 4,
buf + actual, chunk_len);
if (ret < 0) {
printk(BIOS_WARNING, "SF: EON Page Program failed\n");
break;
}
ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
if (ret)
break;
page_addr++;
byte_addr = 0;
}
printk(BIOS_INFO, "SF: EON: Successfully programmed %zu bytes @ 0x%x\n",
len, offset);
spi_release_bus(flash->spi);
return ret;
}
static int eon_erase(struct spi_flash *flash, u32 offset, size_t len)
{
return spi_flash_cmd_erase(flash, CMD_EN25Q128_BE, offset, len);
}
struct spi_flash *spi_flash_probe_eon(struct spi_slave *spi, u8 *idcode)
{
const struct eon_spi_flash_params *params;
struct eon_spi_flash *eon;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(eon_spi_flash_table); ++i) {
params = &eon_spi_flash_table[i];
if (params->idcode1 == idcode[2])
break;
}
if (i == ARRAY_SIZE(eon_spi_flash_table)) {
printk(BIOS_WARNING, "SF: Unsupported EON ID %02x\n", idcode[1]);
return NULL;
}
eon = malloc(sizeof(*eon));
if (!eon) {
printk(BIOS_WARNING, "SF: Failed to allocate memory\n");
return NULL;
}
eon->params = params;
eon->flash.spi = spi;
eon->flash.name = params->name;
eon->flash.write = eon_write;
eon->flash.erase = eon_erase;
eon->flash.read = spi_flash_cmd_read_fast;
eon->flash.sector_size = params->page_size * params->pages_per_sector
* params->sectors_per_block;
eon->flash.size = params->page_size * params->pages_per_sector
* params->nr_sectors;
return &eon->flash;
}

220
src/drivers/spi/macronix.c Normal file
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/*
* Copyright 2009(C) Marvell International Ltd. and its affiliates
* Prafulla Wadaskar <prafulla@marvell.com>
*
* Based on drivers/mtd/spi/stmicro.c
*
* Copyright 2008, Network Appliance Inc.
* Jason McMullan <mcmullan@netapp.com>
*
* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include <stdlib.h>
#include <spi_flash.h>
#include "spi_flash_internal.h"
/* MX25xx-specific commands */
#define CMD_MX25XX_WREN 0x06 /* Write Enable */
#define CMD_MX25XX_WRDI 0x04 /* Write Disable */
#define CMD_MX25XX_RDSR 0x05 /* Read Status Register */
#define CMD_MX25XX_WRSR 0x01 /* Write Status Register */
#define CMD_MX25XX_READ 0x03 /* Read Data Bytes */
#define CMD_MX25XX_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
#define CMD_MX25XX_PP 0x02 /* Page Program */
#define CMD_MX25XX_SE 0x20 /* Sector Erase */
#define CMD_MX25XX_BE 0xD8 /* Block Erase */
#define CMD_MX25XX_CE 0xc7 /* Chip Erase */
#define CMD_MX25XX_DP 0xb9 /* Deep Power-down */
#define CMD_MX25XX_RES 0xab /* Release from DP, and Read Signature */
#define MACRONIX_SR_WIP (1 << 0) /* Write-in-Progress */
struct macronix_spi_flash_params {
u16 idcode;
u16 page_size;
u16 pages_per_sector;
u16 sectors_per_block;
u16 nr_blocks;
const char *name;
};
struct macronix_spi_flash {
struct spi_flash flash;
const struct macronix_spi_flash_params *params;
};
static inline struct macronix_spi_flash *to_macronix_spi_flash(struct spi_flash
*flash)
{
return container_of(flash, struct macronix_spi_flash, flash);
}
static const struct macronix_spi_flash_params macronix_spi_flash_table[] = {
{
.idcode = 0x2015,
.page_size = 256,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 32,
.name = "MX25L1605D",
},
{
.idcode = 0x2016,
.page_size = 256,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 64,
.name = "MX25L3205D",
},
{
.idcode = 0x2017,
.page_size = 256,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 128,
.name = "MX25L6405D",
},
{
.idcode = 0x2018,
.page_size = 256,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 256,
.name = "MX25L12805D",
},
{
.idcode = 0x2618,
.page_size = 256,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 256,
.name = "MX25L12855E",
},
};
static int macronix_write(struct spi_flash *flash,
u32 offset, size_t len, const void *buf)
{
struct macronix_spi_flash *mcx = to_macronix_spi_flash(flash);
unsigned long byte_addr;
unsigned long page_size;
size_t chunk_len;
size_t actual;
int ret;
u8 cmd[4];
page_size = min(mcx->params->page_size, CONTROLLER_PAGE_LIMIT);
byte_addr = offset % page_size;
ret = spi_claim_bus(flash->spi);
if (ret) {
printk(BIOS_WARNING, "SF: Unable to claim SPI bus\n");
return ret;
}
ret = 0;
for (actual = 0; actual < len; actual += chunk_len) {
chunk_len = min(len - actual, page_size - byte_addr);
cmd[0] = CMD_MX25XX_PP;
cmd[1] = (offset >> 16) & 0xff;
cmd[2] = (offset >> 8) & 0xff;
cmd[3] = offset & 0xff;
printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zd\n",
buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
ret = spi_flash_cmd(flash->spi, CMD_MX25XX_WREN, NULL, 0);
if (ret < 0) {
printk(BIOS_WARNING, "SF: Enabling Write failed\n");
break;
}
ret = spi_flash_cmd_write(flash->spi, cmd, 4,
buf + actual, chunk_len);
if (ret < 0) {
printk(BIOS_WARNING, "SF: Macronix Page Program failed\n");
break;
}
ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
if (ret)
break;
offset += chunk_len;
byte_addr = 0;
}
printk(BIOS_INFO, "SF: Macronix: Successfully programmed %zu bytes @ 0x%lx\n",
len, offset - len);
spi_release_bus(flash->spi);
return ret;
}
static int macronix_erase(struct spi_flash *flash, u32 offset, size_t len)
{
return spi_flash_cmd_erase(flash, CMD_MX25XX_SE, offset, len);
}
struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode)
{
const struct macronix_spi_flash_params *params;
struct macronix_spi_flash *mcx;
unsigned int i;
u16 id = idcode[2] | idcode[1] << 8;
for (i = 0; i < ARRAY_SIZE(macronix_spi_flash_table); i++) {
params = &macronix_spi_flash_table[i];
if (params->idcode == id)
break;
}
if (i == ARRAY_SIZE(macronix_spi_flash_table)) {
printk(BIOS_WARNING, "SF: Unsupported Macronix ID %04x\n", id);
return NULL;
}
mcx = malloc(sizeof(*mcx));
if (!mcx) {
printk(BIOS_WARNING, "SF: Failed to allocate memory\n");
return NULL;
}
mcx->params = params;
mcx->flash.spi = spi;
mcx->flash.name = params->name;
mcx->flash.write = macronix_write;
mcx->flash.erase = macronix_erase;
#ifdef CONFIG_SPI_FLASH_NO_FAST_READ
mcx->flash.read = spi_flash_cmd_read_slow;
#else
mcx->flash.read = spi_flash_cmd_read_fast;
#endif
mcx->flash.sector_size = params->page_size * params->pages_per_sector;
mcx->flash.size = mcx->flash.sector_size * params->sectors_per_block *
params->nr_blocks;
return &mcx->flash;
}

241
src/drivers/spi/spansion.c Normal file
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/*
* Copyright (C) 2009 Freescale Semiconductor, Inc.
*
* Author: Mingkai Hu (Mingkai.hu@freescale.com)
* Based on stmicro.c by Wolfgang Denk (wd@denx.de),
* TsiChung Liew (Tsi-Chung.Liew@freescale.com),
* and Jason McMullan (mcmullan@netapp.com)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <stdlib.h>
#include <spi_flash.h>
#include "spi_flash_internal.h"
/* S25FLxx-specific commands */
#define CMD_S25FLXX_READ 0x03 /* Read Data Bytes */
#define CMD_S25FLXX_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
#define CMD_S25FLXX_READID 0x90 /* Read Manufacture ID and Device ID */
#define CMD_S25FLXX_WREN 0x06 /* Write Enable */
#define CMD_S25FLXX_WRDI 0x04 /* Write Disable */
#define CMD_S25FLXX_RDSR 0x05 /* Read Status Register */
#define CMD_S25FLXX_WRSR 0x01 /* Write Status Register */
#define CMD_S25FLXX_PP 0x02 /* Page Program */
#define CMD_S25FLXX_SE 0xd8 /* Sector Erase */
#define CMD_S25FLXX_BE 0xc7 /* Bulk Erase */
#define CMD_S25FLXX_DP 0xb9 /* Deep Power-down */
#define CMD_S25FLXX_RES 0xab /* Release from DP, and Read Signature */
#define SPSN_ID_S25FL008A 0x0213
#define SPSN_ID_S25FL016A 0x0214
#define SPSN_ID_S25FL032A 0x0215
#define SPSN_ID_S25FL064A 0x0216
#define SPSN_ID_S25FL128P 0x2018
#define SPSN_EXT_ID_S25FL128P_256KB 0x0300
#define SPSN_EXT_ID_S25FL128P_64KB 0x0301
#define SPSN_EXT_ID_S25FL032P 0x4d00
struct spansion_spi_flash_params {
u16 idcode1;
u16 idcode2;
u16 page_size;
u16 pages_per_sector;
u16 nr_sectors;
const char *name;
};
struct spansion_spi_flash {
struct spi_flash flash;
const struct spansion_spi_flash_params *params;
};
static inline struct spansion_spi_flash *to_spansion_spi_flash(struct spi_flash
*flash)
{
return container_of(flash, struct spansion_spi_flash, flash);
}
static const struct spansion_spi_flash_params spansion_spi_flash_table[] = {
{
.idcode1 = SPSN_ID_S25FL008A,
.idcode2 = 0,
.page_size = 256,
.pages_per_sector = 256,
.nr_sectors = 16,
.name = "S25FL008A",
},
{
.idcode1 = SPSN_ID_S25FL016A,
.idcode2 = 0,
.page_size = 256,
.pages_per_sector = 256,
.nr_sectors = 32,
.name = "S25FL016A",
},
{
.idcode1 = SPSN_ID_S25FL032A,
.idcode2 = 0,
.page_size = 256,
.pages_per_sector = 256,
.nr_sectors = 64,
.name = "S25FL032A",
},
{
.idcode1 = SPSN_ID_S25FL064A,
.idcode2 = 0,
.page_size = 256,
.pages_per_sector = 256,
.nr_sectors = 128,
.name = "S25FL064A",
},
{
.idcode1 = SPSN_ID_S25FL128P,
.idcode2 = SPSN_EXT_ID_S25FL128P_64KB,
.page_size = 256,
.pages_per_sector = 256,
.nr_sectors = 256,
.name = "S25FL128P_64K",
},
{
.idcode1 = SPSN_ID_S25FL128P,
.idcode2 = SPSN_EXT_ID_S25FL128P_256KB,
.page_size = 256,
.pages_per_sector = 1024,
.nr_sectors = 64,
.name = "S25FL128P_256K",
},
{
.idcode1 = SPSN_ID_S25FL032A,
.idcode2 = SPSN_EXT_ID_S25FL032P,
.page_size = 256,
.pages_per_sector = 256,
.nr_sectors = 64,
.name = "S25FL032P",
},
};
static int spansion_write(struct spi_flash *flash,
u32 offset, size_t len, const void *buf)
{
struct spansion_spi_flash *spsn = to_spansion_spi_flash(flash);
unsigned long page_addr;
unsigned long byte_addr;
unsigned long page_size;
size_t chunk_len;
size_t actual;
int ret;
u8 cmd[4];
page_size = spsn->params->page_size;
page_addr = offset / page_size;
byte_addr = offset % page_size;
ret = spi_claim_bus(flash->spi);
if (ret) {
printk(BIOS_WARNING, "SF: Unable to claim SPI bus\n");
return ret;
}
ret = 0;
for (actual = 0; actual < len; actual += chunk_len) {
chunk_len = min(len - actual, page_size - byte_addr);
cmd[0] = CMD_S25FLXX_PP;
cmd[1] = page_addr >> 8;
cmd[2] = page_addr;
cmd[3] = byte_addr;
printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zd\n",
buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
ret = spi_flash_cmd(flash->spi, CMD_S25FLXX_WREN, NULL, 0);
if (ret < 0) {
printk(BIOS_WARNING, "SF: Enabling Write failed\n");
break;
}
ret = spi_flash_cmd_write(flash->spi, cmd, 4,
buf + actual, chunk_len);
if (ret < 0) {
printk(BIOS_WARNING, "SF: SPANSION Page Program failed\n");
break;
}
ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
if (ret)
break;
page_addr++;
byte_addr = 0;
}
printk(BIOS_INFO, "SF: SPANSION: Successfully programmed %zu bytes @ 0x%x\n",
len, offset);
spi_release_bus(flash->spi);
return ret;
}
static int spansion_erase(struct spi_flash *flash, u32 offset, size_t len)
{
return spi_flash_cmd_erase(flash, CMD_S25FLXX_SE, offset, len);
}
struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode)
{
const struct spansion_spi_flash_params *params;
struct spansion_spi_flash *spsn;
unsigned int i;
unsigned short jedec, ext_jedec;
jedec = idcode[1] << 8 | idcode[2];
ext_jedec = idcode[3] << 8 | idcode[4];
for (i = 0; i < ARRAY_SIZE(spansion_spi_flash_table); i++) {
params = &spansion_spi_flash_table[i];
if (params->idcode1 == jedec) {
if (params->idcode2 == ext_jedec)
break;
}
}
if (i == ARRAY_SIZE(spansion_spi_flash_table)) {
printk(BIOS_WARNING, "SF: Unsupported SPANSION ID %04x %04x\n", jedec, ext_jedec);
return NULL;
}
spsn = malloc(sizeof(struct spansion_spi_flash));
if (!spsn) {
printk(BIOS_WARNING, "SF: Failed to allocate memory\n");
return NULL;
}
spsn->params = params;
spsn->flash.spi = spi;
spsn->flash.name = params->name;
spsn->flash.write = spansion_write;
spsn->flash.erase = spansion_erase;
spsn->flash.read = spi_flash_cmd_read_fast;
spsn->flash.sector_size = params->page_size * params->pages_per_sector;
spsn->flash.size = spsn->flash.sector_size * params->nr_sectors;
return &spsn->flash;
}

309
src/drivers/spi/spi_flash.c Normal file
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/*
* SPI flash interface
*
* Copyright (C) 2008 Atmel Corporation
* Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
*
* Licensed under the GPL-2 or later.
*/
#include <stdlib.h>
#include <string.h>
#include <spi.h>
#include <spi_flash.h>
#include <delay.h>
#include "spi_flash_internal.h"
static void spi_flash_addr(u32 addr, u8 *cmd)
{
/* cmd[0] is actual command */
cmd[1] = addr >> 16;
cmd[2] = addr >> 8;
cmd[3] = addr >> 0;
}
int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
{
int ret = spi_xfer(spi, &cmd, 8, response, len * 8);
if (ret)
printk(BIOS_WARNING, "SF: Failed to send command %02x: %d\n", cmd, ret);
return ret;
}
int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
size_t cmd_len, void *data, size_t data_len)
{
int ret = spi_xfer(spi, cmd, cmd_len * 8, data, data_len * 8);
if (ret) {
printk(BIOS_WARNING, "SF: Failed to send read command (%zu bytes): %d\n",
data_len, ret);
}
return ret;
}
int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
const void *data, size_t data_len)
{
int ret;
u8 buff[cmd_len + data_len];
memcpy(buff, cmd, cmd_len);
memcpy(buff + cmd_len, data, data_len);
ret = spi_xfer(spi, buff, (cmd_len + data_len) * 8, NULL, 0);
if (ret) {
printk(BIOS_WARNING, "SF: Failed to send write command (%zu bytes): %d\n",
data_len, ret);
}
return ret;
}
int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
size_t cmd_len, void *data, size_t data_len)
{
struct spi_slave *spi = flash->spi;
int ret;
spi_claim_bus(spi);
ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
spi_release_bus(spi);
return ret;
}
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
struct spi_slave *spi = flash->spi;
u8 cmd[5];
cmd[0] = CMD_READ_ARRAY_FAST;
spi_flash_addr(offset, cmd);
cmd[4] = 0x00;
return spi_flash_cmd_read(spi, cmd, sizeof(cmd), data, len);
}
int spi_flash_cmd_read_slow(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
struct spi_slave *spi = flash->spi;
u8 cmd[4];
cmd[0] = CMD_READ_ARRAY_SLOW;
spi_flash_addr(offset, cmd);
return spi_flash_cmd_read(spi, cmd, sizeof(cmd), data, len);
}
int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
u8 cmd, u8 poll_bit)
{
struct spi_slave *spi = flash->spi;
unsigned long timebase;
int ret;
u8 status;
timebase = timeout;
do {
ret = spi_flash_cmd_read(spi, &cmd, 1, &status, 1);
if (ret)
return -1;
if ((status & poll_bit) == 0)
break;
mdelay(1);
} while (timebase--);
if ((status & poll_bit) == 0)
return 0;
/* Timed out */
printk(BIOS_DEBUG, "SF: time out!\n");
return -1;
}
int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
{
return spi_flash_cmd_poll_bit(flash, timeout,
CMD_READ_STATUS, STATUS_WIP);
}
int spi_flash_cmd_erase(struct spi_flash *flash, u8 erase_cmd,
u32 offset, size_t len)
{
u32 start, end, erase_size;
int ret;
u8 cmd[4];
erase_size = flash->sector_size;
if (offset % erase_size || len % erase_size) {
printk(BIOS_WARNING, "SF: Erase offset/length not multiple of erase size\n");
return -1;
}
ret = spi_claim_bus(flash->spi);
if (ret) {
printk(BIOS_WARNING, "SF: Unable to claim SPI bus\n");
return ret;
}
cmd[0] = erase_cmd;
start = offset;
end = start + len;
while (offset < end) {
spi_flash_addr(offset, cmd);
offset += erase_size;
printk(BIOS_SPEW, "SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
cmd[2], cmd[3], offset);
ret = spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
if (ret)
goto out;
ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0);
if (ret)
goto out;
ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
if (ret)
goto out;
}
printk(BIOS_DEBUG, "SF: Successfully erased %zu bytes @ %#x\n", len, start);
out:
spi_release_bus(flash->spi);
return ret;
}
/*
* The following table holds all device probe functions
*
* shift: number of continuation bytes before the ID
* idcode: the expected IDCODE or 0xff for non JEDEC devices
* probe: the function to call
*
* Non JEDEC devices should be ordered in the table such that
* the probe functions with best detection algorithms come first.
*
* Several matching entries are permitted, they will be tried
* in sequence until a probe function returns non NULL.
*
* IDCODE_CONT_LEN may be redefined if a device needs to declare a
* larger "shift" value. IDCODE_PART_LEN generally shouldn't be
* changed. This is the max number of bytes probe functions may
* examine when looking up part-specific identification info.
*
* Probe functions will be given the idcode buffer starting at their
* manu id byte (the "idcode" in the table below). In other words,
* all of the continuation bytes will be skipped (the "shift" below).
*/
#define IDCODE_CONT_LEN 0
#define IDCODE_PART_LEN 5
static const struct {
const u8 shift;
const u8 idcode;
struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
} flashes[] = {
/* Keep it sorted by define name */
#if CONFIG_SPI_FLASH_EON
{ 0, 0x1c, spi_flash_probe_eon, },
#endif
#if CONFIG_SPI_FLASH_MACRONIX
{ 0, 0xc2, spi_flash_probe_macronix, },
#endif
#if CONFIG_SPI_FLASH_SPANSION
{ 0, 0x01, spi_flash_probe_spansion, },
#endif
#if CONFIG_SPI_FLASH_SST
{ 0, 0xbf, spi_flash_probe_sst, },
#endif
#if CONFIG_SPI_FLASH_STMICRO
{ 0, 0x20, spi_flash_probe_stmicro, },
#endif
#if CONFIG_SPI_FLASH_WINBOND
{ 0, 0xef, spi_flash_probe_winbond, },
#endif
/* Keep it sorted by best detection */
#if CONFIG_SPI_FLASH_STMICRO
{ 0, 0xff, spi_flash_probe_stmicro, },
#endif
};
#define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int spi_mode)
{
struct spi_slave *spi;
struct spi_flash *flash = NULL;
int ret, i, shift;
u8 idcode[IDCODE_LEN], *idp;
spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
if (!spi) {
printk(BIOS_WARNING, "SF: Failed to set up slave\n");
return NULL;
}
ret = spi_claim_bus(spi);
if (ret) {
printk(BIOS_WARNING, "SF: Failed to claim SPI bus: %d\n", ret);
goto err_claim_bus;
}
/* Read the ID codes */
ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
if (ret)
goto err_read_id;
#if CONFIG_DEBUG_SPI_FLASH
printk(BIOS_SPEW, "SF: Got idcodes\n");
print_buffer(0, idcode, 1, sizeof(idcode), 0);
#endif
/* count the number of continuation bytes */
for (shift = 0, idp = idcode;
shift < IDCODE_CONT_LEN && *idp == 0x7f;
++shift, ++idp)
continue;
/* search the table for matches in shift and id */
for (i = 0; i < ARRAY_SIZE(flashes); ++i)
if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
/* we have a match, call probe */
flash = flashes[i].probe(spi, idp);
if (flash)
break;
}
if (!flash) {
printk(BIOS_WARNING, "SF: Unsupported manufacturer %02x\n", *idp);
goto err_manufacturer_probe;
}
printk(BIOS_INFO, "SF: Detected %s with page size %x, total %x\n",
flash->name, flash->sector_size, flash->size);
spi_release_bus(spi);
return flash;
err_manufacturer_probe:
err_read_id:
spi_release_bus(spi);
err_claim_bus:
spi_free_slave(spi);
return NULL;
}
void spi_flash_free(struct spi_flash *flash)
{
spi_free_slave(flash->spi);
free(flash);
}

81
src/drivers/spi/spi_flash_internal.h Normal file
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/*
* SPI flash internal definitions
*
* Copyright (C) 2008 Atmel Corporation
*/
/* Common parameters -- kind of high, but they should only occur when there
* is a problem (and well your system already is broken), so err on the side
* of caution in case we're dealing with slower SPI buses and/or processors.
*/
#define CONFIG_SYS_HZ 100
#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
/* Common commands */
#define CMD_READ_ID 0x9f
#define CMD_READ_ARRAY_SLOW 0x03
#define CMD_READ_ARRAY_FAST 0x0b
#define CMD_READ_ARRAY_LEGACY 0xe8
#define CMD_READ_STATUS 0x05
#define CMD_WRITE_ENABLE 0x06
/* Common status */
#define STATUS_WIP 0x01
/* Send a single-byte command to the device and read the response */
int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
/*
* Send a multi-byte command to the device and read the response. Used
* for flash array reads, etc.
*/
int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
size_t cmd_len, void *data, size_t data_len);
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data);
int spi_flash_cmd_read_slow(struct spi_flash *flash, u32 offset,
size_t len, void *data);
/*
* Send a multi-byte command to the device followed by (optional)
* data. Used for programming the flash array, etc.
*/
int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
const void *data, size_t data_len);
/*
* Same as spi_flash_cmd_read() except it also claims/releases the SPI
* bus. Used as common part of the ->read() operation.
*/
int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
size_t cmd_len, void *data, size_t data_len);
/* Send a command to the device and wait for some bit to clear itself. */
int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
u8 cmd, u8 poll_bit);
/*
* Send the read status command to the device and wait for the wip
* (write-in-progress) bit to clear itself.
*/
int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
/* Erase sectors. */
int spi_flash_cmd_erase(struct spi_flash *flash, u8 erase_cmd,
u32 offset, size_t len);
/* Manufacturer-specific probe functions */
struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_eon(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode);

268
src/drivers/spi/sst.c Normal file
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/*
* Driver for SST serial flashes
*
* (C) Copyright 2000-2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
* Copyright 2008, Network Appliance Inc.
* Jason McMullan <mcmullan@netapp.com>
* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
* Copyright (c) 2008-2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <stdlib.h>
#include <spi_flash.h>
#include "spi_flash_internal.h"
#define CMD_SST_WREN 0x06 /* Write Enable */
#define CMD_SST_WRDI 0x04 /* Write Disable */
#define CMD_SST_RDSR 0x05 /* Read Status Register */
#define CMD_SST_WRSR 0x01 /* Write Status Register */
#define CMD_SST_READ 0x03 /* Read Data Bytes */
#define CMD_SST_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
#define CMD_SST_BP 0x02 /* Byte Program */
#define CMD_SST_AAI_WP 0xAD /* Auto Address Increment Word Program */
#define CMD_SST_SE 0x20 /* Sector Erase */
#define SST_SR_WIP (1 << 0) /* Write-in-Progress */
#define SST_SR_WEL (1 << 1) /* Write enable */
#define SST_SR_BP0 (1 << 2) /* Block Protection 0 */
#define SST_SR_BP1 (1 << 3) /* Block Protection 1 */
#define SST_SR_BP2 (1 << 4) /* Block Protection 2 */
#define SST_SR_AAI (1 << 6) /* Addressing mode */
#define SST_SR_BPL (1 << 7) /* BP bits lock */
struct sst_spi_flash_params {
u8 idcode1;
u16 nr_sectors;
const char *name;
};
struct sst_spi_flash {
struct spi_flash flash;
const struct sst_spi_flash_params *params;
};
static inline struct sst_spi_flash *to_sst_spi_flash(struct spi_flash *flash)
{
return container_of(flash, struct sst_spi_flash, flash);
}
#define SST_SECTOR_SIZE (4 * 1024)
static const struct sst_spi_flash_params sst_spi_flash_table[] = {
{
.idcode1 = 0x8d,
.nr_sectors = 128,
.name = "SST25VF040B",
},{
.idcode1 = 0x8e,
.nr_sectors = 256,
.name = "SST25VF080B",
},{
.idcode1 = 0x41,
.nr_sectors = 512,
.name = "SST25VF016B",
},{
.idcode1 = 0x4a,
.nr_sectors = 1024,
.name = "SST25VF032B",
},{
.idcode1 = 0x4b,
.nr_sectors = 2048,
.name = "SST25VF064C",
},{
.idcode1 = 0x01,
.nr_sectors = 16,
.name = "SST25WF512",
},{
.idcode1 = 0x02,
.nr_sectors = 32,
.name = "SST25WF010",
},{
.idcode1 = 0x03,
.nr_sectors = 64,
.name = "SST25WF020",
},{
.idcode1 = 0x04,
.nr_sectors = 128,
.name = "SST25WF040",
},
};
static int
sst_enable_writing(struct spi_flash *flash)
{
int ret = spi_flash_cmd(flash->spi, CMD_SST_WREN, NULL, 0);
if (ret)
printk(BIOS_WARNING, "SF: Enabling Write failed\n");
return ret;
}
static int
sst_disable_writing(struct spi_flash *flash)
{
int ret = spi_flash_cmd(flash->spi, CMD_SST_WRDI, NULL, 0);
if (ret)
printk(BIOS_WARNING, "SF: Disabling Write failed\n");
return ret;
}
static int
sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
{
int ret;
u8 cmd[4] = {
CMD_SST_BP,
offset >> 16,
offset >> 8,
offset,
};
printk(BIOS_SPEW, "BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
spi_w8r8(flash->spi, CMD_SST_RDSR), buf, cmd[0], offset);
ret = sst_enable_writing(flash);
if (ret)
return ret;
ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
if (ret)
return ret;
return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
}
static int
sst_write(struct spi_flash *flash, u32 offset, size_t len, const void *buf)
{
size_t actual, cmd_len;
int ret;
u8 cmd[4];
ret = spi_claim_bus(flash->spi);
if (ret) {
printk(BIOS_WARNING, "SF: Unable to claim SPI bus\n");
return ret;
}
/* If the data is not word aligned, write out leading single byte */
actual = offset % 2;
if (actual) {
ret = sst_byte_write(flash, offset, buf);
if (ret)
goto done;
}
offset += actual;
ret = sst_enable_writing(flash);
if (ret)
goto done;
cmd_len = 4;
cmd[0] = CMD_SST_AAI_WP;
cmd[1] = offset >> 16;
cmd[2] = offset >> 8;
cmd[3] = offset;
for (; actual < len - 1; actual += 2) {
printk(BIOS_SPEW, "WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
spi_w8r8(flash->spi, CMD_SST_RDSR), buf + actual, cmd[0],
offset);
ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
buf + actual, 2);
if (ret) {
printk(BIOS_WARNING, "SF: SST word program failed\n");
break;
}
ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
if (ret)
break;
cmd_len = 1;
offset += 2;
}
if (!ret)
ret = sst_disable_writing(flash);
/* If there is a single trailing byte, write it out */
if (!ret && actual != len)
ret = sst_byte_write(flash, offset, buf + actual);
done:
printk(BIOS_INFO, "SF: SST: program %s %zu bytes @ 0x%lx\n",
ret ? "failure" : "success", len, offset - actual);
spi_release_bus(flash->spi);
return ret;
}
static int sst_erase(struct spi_flash *flash, u32 offset, size_t len)
{
return spi_flash_cmd_erase(flash, CMD_SST_SE, offset, len);
}
static int
sst_unlock(struct spi_flash *flash)
{
int ret;
u8 cmd, status;
ret = sst_enable_writing(flash);
if (ret)
return ret;
cmd = CMD_SST_WRSR;
status = 0;
ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &status, 1);
if (ret)
printk(BIOS_WARNING, "SF: Unable to set status byte\n");
printk(BIOS_INFO, "SF: SST: status = %x\n", spi_w8r8(flash->spi, CMD_SST_RDSR));
return ret;
}
struct spi_flash *
spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode)
{
const struct sst_spi_flash_params *params;
struct sst_spi_flash *stm;
size_t i;
for (i = 0; i < ARRAY_SIZE(sst_spi_flash_table); ++i) {
params = &sst_spi_flash_table[i];
if (params->idcode1 == idcode[2])
break;
}
if (i == ARRAY_SIZE(sst_spi_flash_table)) {
printk(BIOS_WARNING, "SF: Unsupported SST ID %02x\n", idcode[1]);
return NULL;
}
stm = malloc(sizeof(*stm));
if (!stm) {
printk(BIOS_WARNING, "SF: Failed to allocate memory\n");
return NULL;
}
stm->params = params;
stm->flash.spi = spi;
stm->flash.name = params->name;
stm->flash.write = sst_write;
stm->flash.erase = sst_erase;
stm->flash.read = spi_flash_cmd_read_fast;
stm->flash.sector_size = SST_SECTOR_SIZE;
stm->flash.size = stm->flash.sector_size * params->nr_sectors;
/* Flash powers up read-only, so clear BP# bits */
sst_unlock(&stm->flash);
return &stm->flash;
}

250
src/drivers/spi/stmicro.c Normal file
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/*
* (C) Copyright 2000-2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Copyright 2008, Network Appliance Inc.
* Jason McMullan <mcmullan@netapp.com>
*
* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <stdlib.h>
#include <spi_flash.h>
#include "spi_flash_internal.h"
/* M25Pxx-specific commands */
#define CMD_M25PXX_WREN 0x06 /* Write Enable */
#define CMD_M25PXX_WRDI 0x04 /* Write Disable */
#define CMD_M25PXX_RDSR 0x05 /* Read Status Register */
#define CMD_M25PXX_WRSR 0x01 /* Write Status Register */
#define CMD_M25PXX_READ 0x03 /* Read Data Bytes */
#define CMD_M25PXX_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
#define CMD_M25PXX_PP 0x02 /* Page Program */
#define CMD_M25PXX_SE 0xd8 /* Sector Erase */
#define CMD_M25PXX_BE 0xc7 /* Bulk Erase */
#define CMD_M25PXX_DP 0xb9 /* Deep Power-down */
#define CMD_M25PXX_RES 0xab /* Release from DP, and Read Signature */
#define STM_ID_M25P10 0x11
#define STM_ID_M25P16 0x15
#define STM_ID_M25P20 0x12
#define STM_ID_M25P32 0x16
#define STM_ID_M25P40 0x13
#define STM_ID_M25P64 0x17
#define STM_ID_M25P80 0x14
#define STM_ID_M25P128 0x18
struct stmicro_spi_flash_params {
u8 idcode1;
u16 page_size;
u16 pages_per_sector;
u16 nr_sectors;
const char *name;
};
/* spi_flash needs to be first so upper layers can free() it */
struct stmicro_spi_flash {
struct spi_flash flash;
const struct stmicro_spi_flash_params *params;
};
static inline struct stmicro_spi_flash *to_stmicro_spi_flash(struct spi_flash
*flash)
{
return container_of(flash, struct stmicro_spi_flash, flash);
}
static const struct stmicro_spi_flash_params stmicro_spi_flash_table[] = {
{
.idcode1 = STM_ID_M25P10,
.page_size = 256,
.pages_per_sector = 128,
.nr_sectors = 4,
.name = "M25P10",
},
{
.idcode1 = STM_ID_M25P16,
.page_size = 256,
.pages_per_sector = 256,
.nr_sectors = 32,
.name = "M25P16",
},
{
.idcode1 = STM_ID_M25P20,
.page_size = 256,
.pages_per_sector = 256,
.nr_sectors = 4,
.name = "M25P20",
},
{
.idcode1 = STM_ID_M25P32,
.page_size = 256,
.pages_per_sector = 256,
.nr_sectors = 64,
.name = "M25P32",
},
{
.idcode1 = STM_ID_M25P40,
.page_size = 256,
.pages_per_sector = 256,
.nr_sectors = 8,
.name = "M25P40",
},
{
.idcode1 = STM_ID_M25P64,
.page_size = 256,
.pages_per_sector = 256,
.nr_sectors = 128,
.name = "M25P64",
},
{
.idcode1 = STM_ID_M25P80,
.page_size = 256,
.pages_per_sector = 256,
.nr_sectors = 16,
.name = "M25P80",
},
{
.idcode1 = STM_ID_M25P128,
.page_size = 256,
.pages_per_sector = 1024,
.nr_sectors = 64,
.name = "M25P128",
},
};
static int stmicro_write(struct spi_flash *flash,
u32 offset, size_t len, const void *buf)
{
struct stmicro_spi_flash *stm = to_stmicro_spi_flash(flash);
unsigned long page_addr;
unsigned long byte_addr;
unsigned long page_size;
size_t chunk_len;
size_t actual;
int ret;
u8 cmd[4];
page_size = stm->params->page_size;
page_addr = offset / page_size;
byte_addr = offset % page_size;
ret = spi_claim_bus(flash->spi);
if (ret) {
printk(BIOS_WARNING, "SF: Unable to claim SPI bus\n");
return ret;
}
ret = 0;
for (actual = 0; actual < len; actual += chunk_len) {
chunk_len = min(len - actual, page_size - byte_addr);
cmd[0] = CMD_M25PXX_PP;
cmd[1] = page_addr >> 8;
cmd[2] = page_addr;
cmd[3] = byte_addr;
printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zd\n",
buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
ret = spi_flash_cmd(flash->spi, CMD_M25PXX_WREN, NULL, 0);
if (ret < 0) {
printk(BIOS_WARNING, "SF: Enabling Write failed\n");
break;
}
ret = spi_flash_cmd_write(flash->spi, cmd, 4,
buf + actual, chunk_len);
if (ret < 0) {
printk(BIOS_WARNING, "SF: STMicro Page Program failed\n");
break;
}
ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
if (ret)
break;
page_addr++;
byte_addr = 0;
}
printk(BIOS_INFO, "SF: STMicro: Successfully programmed %zu bytes @ 0x%x\n",
len, offset);
spi_release_bus(flash->spi);
return ret;
}
static int stmicro_erase(struct spi_flash *flash, u32 offset, size_t len)
{
return spi_flash_cmd_erase(flash, CMD_M25PXX_SE, offset, len);
}
struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 * idcode)
{
const struct stmicro_spi_flash_params *params;
struct stmicro_spi_flash *stm;
unsigned int i;
if (idcode[0] == 0xff) {
i = spi_flash_cmd(spi, CMD_M25PXX_RES,
idcode, 4);
if (i)
return NULL;
if ((idcode[3] & 0xf0) == 0x10) {
idcode[0] = 0x20;
idcode[1] = 0x20;
idcode[2] = idcode[3] + 1;
} else
return NULL;
}
for (i = 0; i < ARRAY_SIZE(stmicro_spi_flash_table); i++) {
params = &stmicro_spi_flash_table[i];
if (params->idcode1 == idcode[2]) {
break;
}
}
if (i == ARRAY_SIZE(stmicro_spi_flash_table)) {
printk(BIOS_WARNING, "SF: Unsupported STMicro ID %02x\n", idcode[1]);
return NULL;
}
stm = malloc(sizeof(struct stmicro_spi_flash));
if (!stm) {
printk(BIOS_WARNING, "SF: Failed to allocate memory\n");
return NULL;
}
stm->params = params;
stm->flash.spi = spi;
stm->flash.name = params->name;
stm->flash.write = stmicro_write;
stm->flash.erase = stmicro_erase;
stm->flash.read = spi_flash_cmd_read_fast;
stm->flash.sector_size = params->page_size * params->pages_per_sector;
stm->flash.size = stm->flash.sector_size * params->nr_sectors;
return &stm->flash;
}

218
src/drivers/spi/winbond.c Normal file
View File

@@ -0,0 +1,218 @@
/*
* Copyright 2008, Network Appliance Inc.
* Author: Jason McMullan <mcmullan <at> netapp.com>
* Licensed under the GPL-2 or later.
*/
#include <stdlib.h>
#include <spi_flash.h>
#include "spi_flash_internal.h"
/* M25Pxx-specific commands */
#define CMD_W25_WREN 0x06 /* Write Enable */
#define CMD_W25_WRDI 0x04 /* Write Disable */
#define CMD_W25_RDSR 0x05 /* Read Status Register */
#define CMD_W25_WRSR 0x01 /* Write Status Register */
#define CMD_W25_READ 0x03 /* Read Data Bytes */
#define CMD_W25_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
#define CMD_W25_PP 0x02 /* Page Program */
#define CMD_W25_SE 0x20 /* Sector (4K) Erase */
#define CMD_W25_BE 0xd8 /* Block (64K) Erase */
#define CMD_W25_CE 0xc7 /* Chip Erase */
#define CMD_W25_DP 0xb9 /* Deep Power-down */
#define CMD_W25_RES 0xab /* Release from DP, and Read Signature */
struct winbond_spi_flash_params {
uint16_t id;
/* Log2 of page size in power-of-two mode */
uint8_t l2_page_size;
uint16_t pages_per_sector;
uint16_t sectors_per_block;
uint16_t nr_blocks;
const char *name;
};
/* spi_flash needs to be first so upper layers can free() it */
struct winbond_spi_flash {
struct spi_flash flash;
const struct winbond_spi_flash_params *params;
};
static inline struct winbond_spi_flash *
to_winbond_spi_flash(struct spi_flash *flash)
{
return container_of(flash, struct winbond_spi_flash, flash);
}
static const struct winbond_spi_flash_params winbond_spi_flash_table[] = {
{
.id = 0x3015,
.l2_page_size = 8,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 32,
.name = "W25X16",
},
{
.id = 0x3016,
.l2_page_size = 8,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 64,
.name = "W25X32",
},
{
.id = 0x3017,
.l2_page_size = 8,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 128,
.name = "W25X64",
},
{
.id = 0x4015,
.l2_page_size = 8,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 32,
.name = "W25Q16",
},
{
.id = 0x4016,
.l2_page_size = 8,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 64,
.name = "W25Q32",
},
{
.id = 0x4017,
.l2_page_size = 8,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 128,
.name = "W25Q64",
},
{
.id = 0x4018,
.l2_page_size = 8,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 256,
.name = "W25Q128",
},
};
static int winbond_write(struct spi_flash *flash,
u32 offset, size_t len, const void *buf)
{
struct winbond_spi_flash *stm = to_winbond_spi_flash(flash);
unsigned long byte_addr;
unsigned long page_size;
size_t chunk_len;
size_t actual;
int ret;
u8 cmd[4];
page_size = min(1 << stm->params->l2_page_size, CONTROLLER_PAGE_LIMIT);
byte_addr = offset % page_size;
ret = spi_claim_bus(flash->spi);
if (ret) {
printk(BIOS_WARNING, "SF: Unable to claim SPI bus\n");
return ret;
}
for (actual = 0; actual < len; actual += chunk_len) {
chunk_len = min(len - actual, page_size - byte_addr);
cmd[0] = CMD_W25_PP;
cmd[1] = (offset >> 16) & 0xff;
cmd[2] = (offset >> 8) & 0xff;
cmd[3] = offset & 0xff;
printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %ld\n",
buf + actual,
cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
ret = spi_flash_cmd(flash->spi, CMD_W25_WREN, NULL, 0);
if (ret < 0) {
printk(BIOS_WARNING, "SF: Enabling Write failed\n");
goto out;
}
ret = spi_flash_cmd_write(flash->spi, cmd, 4,
buf + actual, chunk_len);
if (ret < 0) {
printk(BIOS_WARNING, "SF: Winbond Page Program failed\n");
goto out;
}
ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
if (ret)
goto out;
offset += chunk_len;
byte_addr = 0;
}
printk(BIOS_INFO, "SF: Winbond: Successfully programmed %zu bytes @ 0x%lx\n",
len, offset - len);
ret = 0;
out:
spi_release_bus(flash->spi);
return ret;
}
static int winbond_erase(struct spi_flash *flash, u32 offset, size_t len)
{
return spi_flash_cmd_erase(flash, CMD_W25_SE, offset, len);
}
struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode)
{
const struct winbond_spi_flash_params *params;
unsigned page_size;
struct winbond_spi_flash *stm;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(winbond_spi_flash_table); i++) {
params = &winbond_spi_flash_table[i];
if (params->id == ((idcode[1] << 8) | idcode[2]))
break;
}
if (i == ARRAY_SIZE(winbond_spi_flash_table)) {
printk(BIOS_WARNING, "SF: Unsupported Winbond ID %02x%02x\n",
idcode[1], idcode[2]);
return NULL;
}
stm = malloc(sizeof(struct winbond_spi_flash));
if (!stm) {
printk(BIOS_WARNING, "SF: Failed to allocate memory\n");
return NULL;
}
stm->params = params;
stm->flash.spi = spi;
stm->flash.name = params->name;
/* Assuming power-of-two page size initially. */
page_size = 1 << params->l2_page_size;
stm->flash.write = winbond_write;
stm->flash.erase = winbond_erase;
#ifdef CONFIG_SPI_FLASH_NO_FAST_READ
stm->flash.read = spi_flash_cmd_read_slow;
#else
stm->flash.read = spi_flash_cmd_read_fast;
#endif
stm->flash.sector_size = (1 << stm->params->l2_page_size) *
stm->params->pages_per_sector;
stm->flash.size = page_size * params->pages_per_sector
* params->sectors_per_block
* params->nr_blocks;
return &stm->flash;
}