soc/amd/picasso: don't apply unconfigured USB2 PHY tune parameters
Since FSP pre-populates the UPD struct with the non-zero default values, coreboot shouldn't set them to zero in the case that they aren't configured in the board's devicetree. Since all parameters being zero is a valid case, this patch adds another devicetree option that applying the devicetree settings for the USB2 PHY tuning depends on being set. BUG=b:161923068 Change-Id: I66e5811ce64298b0644d2881420634a8ce1379d7 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43781 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@@ -133,13 +133,13 @@ struct soc_amd_picasso_config {
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uint8_t xhci0_force_gen1;
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uint8_t has_usb2_phy_tune_params;
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struct usb2_phy_tune usb_2_port_0_tune_params;
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struct usb2_phy_tune usb_2_port_1_tune_params;
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struct usb2_phy_tune usb_2_port_2_tune_params;
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struct usb2_phy_tune usb_2_port_3_tune_params;
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struct usb2_phy_tune usb_2_port_4_tune_params;
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struct usb2_phy_tune usb_2_port_5_tune_params;
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};
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typedef struct soc_amd_picasso_config config_t;
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