intel/fsp2_0: Add help text for FSP_TEMP_RAM_SIZE Kconfig

For CML & ICL, FSP requires at least heap = 0x10000 and stack = 0x20000.
Refer to FSP integration guide to know the exact FSP requirement.

BUG=b:140268415
TEST=Build and boot CML-Hatch and ICL.

Change-Id: Ic1463181b4a9dca136d00cb2f7e3cce4f7e57bd6
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35301
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/drivers/intel/fsp2_0/Kconfig

@@ -154,8 +154,12 @@ config FSP_USES_CB_STACK
 
 config FSP_TEMP_RAM_SIZE
 	hex
-	default 0x10000
 	depends on FSP_USES_CB_STACK
+	help
+	  The amount of anticipated heap usage in CAR by FSP to setup HOB.
+	  This configuration is applicable for FSP specification using shared
+	  stack with coreboot/bootloader.
+	  Sync this value with Platform FSP integration guide recommendation.
 
 config VERIFY_HOBS
 	bool "Verify the FSP hand-off-blocks"

src/soc/intel/cannonlake/Kconfig

@@ -125,6 +125,15 @@ config DCACHE_BSP_STACK_SIZE
 	  The amount of anticipated stack usage in CAR by bootblock and
 	  other stages.
 
+config FSP_TEMP_RAM_SIZE
+	hex
+	depends on FSP_USES_CB_STACK
+	default 0x10000
+	help
+	  The amount of anticipated heap usage in CAR by FSP.
+	  Refer to Platform FSP integration guide document to know
+	  the exact FSP requirement for Heap setup.
+
 config IFD_CHIPSET
 	string
 	default "cnl"

src/soc/intel/icelake/Kconfig

@@ -76,6 +76,15 @@ config DCACHE_BSP_STACK_SIZE
 	  The amount of anticipated stack usage in CAR by bootblock and
 	  other stages.
 
+config FSP_TEMP_RAM_SIZE
+	hex
+	depends on FSP_USES_CB_STACK
+	default 0x10000
+	help
+	  The amount of anticipated heap usage in CAR by FSP.
+	  Refer to Platform FSP integration guide document to know
+	  the exact FSP requirement for Heap setup.
+
 config IFD_CHIPSET
 	string
 	default "icl"