Split the two usages of __ROMCC__:
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them." __PRE_RAM__ means "Use simpler versions of functions, and no device tree." There are probably some places where both are tested, but only one is needed. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -2,7 +2,7 @@
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#include <arch/cpu.h>
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#include <cpu/amd/dualcore.h>
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#ifdef __ROMCC__
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#ifdef __PRE_RAM__
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#include <cpu/amd/model_fxx_msr.h>
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#endif
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@ -17,7 +17,7 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef __ROMCC__
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#ifndef __PRE_RAM__
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#include <stdint.h>
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#include <console/console.h>
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@ -23,8 +23,8 @@
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#include <cpu/x86/lapic.h>
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/* NOTE: We use the APIC TIMER register is to hold flags for AP init during
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* pre-memory init (ROMCC). Don't use init_timer() and udelay is redirected
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* to udelay_tsc().
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* pre-memory init (__PRE_RAM__). Don't use init_timer() and udelay is
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* redirected to udelay_tsc().
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*/
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@ -18,7 +18,7 @@
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*/
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#ifndef __ROMCC__
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#ifndef __PRE_RAM__
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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@ -29,7 +29,7 @@
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static const u8 microcode_updates[] __attribute__ ((aligned(16))) = {
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#ifdef __ROMCC__
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#ifdef __PRE_RAM__
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/* From the Revision Guide :
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* Equivalent Processor Table for AMD Family 10h Processors
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@ -20,7 +20,7 @@
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#include <arch/cpu.h>
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#include <cpu/amd/quadcore.h>
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#ifdef __ROMCC__
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#ifdef __PRE_RAM__
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#include <cpu/amd/model_10xxx_msr.h>
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#endif
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@ -22,7 +22,7 @@
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#include <arch/asm.h>
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// Make sure no stage 2 code is included:
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#define __ROMCC__
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#define __PRE_RAM__
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// FIXME: Is this piece of code southbridge specific, or
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// can it be cleaned up so this include is not required?
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