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fsp_baytrail: Add functions to set a GPIO

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Add two functions to set a memory mapped GPIO to a given value.

TEST=Booted siemens/mc_tcu3 board and confirmed GPIO-value after
     using this functions.

Change-Id: Idc14c5d4049487e60040cc294ba0cea363d998a6
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: http://review.coreboot.org/12341
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Werner Zeh
2015-11-06 08:38:38 +01:00
committed by Martin Roth
parent e619a9ac9b
commit 1e8a3015e9
2 changed files with 42 additions and 0 deletions
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18
src/soc/intel/fsp_baytrail/baytrail/gpio.h
View File

@@ -336,7 +336,9 @@ void setup_soc_gpios(struct soc_gpio_config *config);
/* This function is weak and can be overridden by a mainboard function. */ /* This function is weak and can be overridden by a mainboard function. */
struct soc_gpio_config* mainboard_get_gpios(void); struct soc_gpio_config* mainboard_get_gpios(void);
uint8_t read_score_gpio(uint8_t gpio_num); uint8_t read_score_gpio(uint8_t gpio_num);
void write_score_gpio(uint8_t gpio_num, uint8_t val);
uint8_t read_ssus_gpio(uint8_t gpio_num); uint8_t read_ssus_gpio(uint8_t gpio_num);
void write_ssus_gpio(uint8_t gpio_num, uint8_t val);
void configure_ssus_gpio(uint8_t gpio_num, uint32_t pconf0, uint32_t pad_val); void configure_ssus_gpio(uint8_t gpio_num, uint32_t pconf0, uint32_t pad_val);
void configure_score_gpio(uint8_t gpio_num, uint32_t pconf0, uint32_t pad_val); void configure_score_gpio(uint8_t gpio_num, uint32_t pconf0, uint32_t pad_val);
@@ -398,6 +400,22 @@ static inline int ssus_get_gpio(int pad)
return read32(val_addr) & PAD_VAL_HIGH; return read32(val_addr) & PAD_VAL_HIGH;
} }
/* These functions require that the output pad is configured as an output */
/* GPIO and is mapped to memory space and not IO space. */
static inline void score_set_gpio(int pad, int val)
{
uint32_t *val_addr = score_pconf0(pad) + (PAD_VAL_REG/sizeof(uint32_t));
write32(val_addr, ((read32(val_addr) & ~0x1) | val));
}
static inline void ssus_set_gpio(int pad, int val)
{
uint32_t *val_addr = ssus_pconf0(pad) + (PAD_VAL_REG/sizeof(uint32_t));
write32(val_addr, ((read32(val_addr) & ~0x1) | val));
}
static inline void ssus_disable_internal_pull(int pad) static inline void ssus_disable_internal_pull(int pad)
{ {
const uint32_t pull_mask = ~(0xf << 7); const uint32_t pull_mask = ~(0xf << 7);

24
src/soc/intel/fsp_baytrail/gpio.c
View File

@@ -266,6 +266,18 @@ uint8_t read_score_gpio(uint8_t gpio_num)
return retval; return retval;
} }
/** \brief sets an output SCORE GPIO to desired value
*
* @param gpio_num The GPIO number being read
* @param val The value this output must be set to (0 or 1)
* @return void
*/
void write_score_gpio(uint8_t gpio_num, uint8_t val)
{
if (gpio_num < GPSCORE_COUNT)
score_set_gpio(gpscore_gpio_to_pad[gpio_num], val);
}
/** \brief returns the input / output value from an SSUS GPIO /** \brief returns the input / output value from an SSUS GPIO
* *
* @param gpio_num The GPIO number being read * @param gpio_num The GPIO number being read
@@ -280,6 +292,18 @@ uint8_t read_ssus_gpio(uint8_t gpio_num)
return retval; return retval;
} }
/** \brief sets an output SSUS GPIO to desired value
*
* @param gpio_num The GPIO number being read
* @param val The value this output must be set to (0 or 1)
* @return void
*/
void write_ssus_gpio(uint8_t gpio_num, uint8_t val)
{
if (gpio_num < GPSSUS_COUNT)
ssus_set_gpio(gpssus_gpio_to_pad[gpio_num], val);
}
/** \brief Sets up the function, pulls, and Input/Output of a Baytrail /** \brief Sets up the function, pulls, and Input/Output of a Baytrail
* SSUS (S5) or SCORE (S0) GPIO * SSUS (S5) or SCORE (S0) GPIO
* *