soc/intel/{apl,cnl,dnv,icl,skl}: Move lpc.asl into common/block/acpi

This patch creates a common instance of lpc.asl inside intel common
code (soc/intel/common/block/acpi/acpi) and asks specific soc code to
refer lpc.asl from common code block.

Note: From ICL onwards Intel Bus Device 0:1f.0 is known as eSPI
rather than LPC.

TEST=Able to build and boot ICL DE system. Dump DSDT.asl to verify
Device(LPCB) device presence after booting to OS.

Change-Id: I266d6e667e7ae794377e4882791e3be933d35e87
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36455
Reviewed-by: Michael Niewöhner
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/apollolake/acpi/lpc.asl

@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2013 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* Intel LPC Bus Device  - 0:1f.0 */
-
-Device (LPCB)
-{
-	Name (_ADR, 0x001f0000)
-}

src/soc/intel/apollolake/acpi/southbridge.asl

@@ -33,7 +33,7 @@
 #include "xhci.asl"
 
 /* LPC */
-#include "lpc.asl"
+#include <soc/intel/common/block/acpi/acpi/lpc.asl>
 
 /* eMMC */
 #include "scs.asl"

src/soc/intel/apollolake/include/soc/iomap.h

@@ -25,6 +25,8 @@
 #define MCH_BASE_ADDRESS		0xfed10000
 #define MCH_BASE_SIZE			(32 * KiB)
 
+#define HPET_BASE_ADDRESS		0xfed00000
+
 #define ACPI_BASE_ADDRESS		0x400
 #define ACPI_BASE_SIZE			0x100
 #define R_ACPI_PM1_TMR			0x8