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arch/x86: Reduce max phys address size for Intel TME capable SoCs

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On Intel SoCs, if TME is supported, TME key ID bits are reserved and
should be subtracted from the maximum physical addresses available.

BUG=288978352
TEST=Verified that DMAR ACPI table `Host Address Width` field on rex
     went from 45 to 41.

Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Change-Id: I9504a489782ab6ef8950a8631c269ed39c63f34d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77613
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Jeremy Compostella
2023-09-07 10:33:30 -07:00
committed by Subrata Banik
parent a6a5b25ce4
commit 1eff77bc59
5 changed files with 46 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
src/arch/x86/cpu_common.c
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@@ -49,8 +49,11 @@ int cpu_phys_address_size(void)
if (!(cpu_have_cpuid()))
return 32;
if (cpu_cpuid_extended_level() >= 0x80000008)
return cpuid_eax(0x80000008) & 0xff;
if (cpu_cpuid_extended_level() >= 0x80000008) {
int size = cpuid_eax(0x80000008) & 0xff;
size -= get_reserved_phys_addr_bits();
return size;
}
if (cpuid_edx(1) & (CPUID_FEATURE_PAE | CPUID_FEATURE_PSE36))
return 36;