- Fix UDELAY options and HAVE_INIT_TIMER [kconfig]

(defaults to UDELAY_IO again, like newconfig)
- Use UDELAY_TSC on Via C7 [kconfig]
- Support Tinybootblock on Intel CPUs
- set XIP location correctly for Tinybootblock on Intel
- provide correct XIP location in Tinybootblock configuration
- Make kontron/986lcd-m use Tinybootblock
- Some kconfig fixes to kontron/986lcd-m [kconfig]

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi
2010-01-04 20:09:27 +00:00
parent ce56835a5c
commit 1f807fd42f
12 changed files with 34 additions and 18 deletions

View File

@@ -114,7 +114,13 @@ clear_mtrrs:
/* Enable cache for our code in Flash because we do XIP here */
movl $MTRRphysBase_MSR(1), %ecx
xorl %edx, %edx
movl $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
#else
#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
#endif
movl $REAL_XIP_ROM_BASE, %eax
orl $MTRR_TYPE_WRBACK, %eax
wrmsr
movl $MTRRphysMask_MSR(1), %ecx

View File

@@ -25,6 +25,7 @@ void stage1_main(unsigned long bist)
{
unsigned int cpu_reset = 0;
#if !defined(CONFIG_TINY_BOOTBLOCK) || !CONFIG_TINY_BOOTBLOCK
#if CONFIG_USE_FALLBACK_IMAGE == 1
/* Is this a deliberate reset by the bios */
if (bios_reset_detected() && last_boot_normal()) {
@@ -45,6 +46,7 @@ void stage1_main(unsigned long bist)
: "a" (bist) /* inputs */
);
fallback_image:
#endif
#endif
real_main(bist);

View File

@@ -104,7 +104,13 @@ clear_mtrrs:
/* Enable cache for our code in Flash because we do XIP here */
movl $MTRRphysBase_MSR(1), %ecx
xorl %edx, %edx
movl $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
#else
#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
#endif
movl $REAL_XIP_ROM_BASE, %eax
orl $MTRR_TYPE_WRBACK, %eax
wrmsr
movl $MTRRphysMask_MSR(1), %ecx

View File

@@ -27,6 +27,7 @@ void stage1_main(unsigned long bist)
{
unsigned int cpu_reset = 0;
#if !defined(CONFIG_TINY_BOOTBLOCK) || !CONFIG_TINY_BOOTBLOCK
#if CONFIG_USE_FALLBACK_IMAGE == 1
/* Is this a deliberate reset by the bios */
if (bios_reset_detected() && last_boot_normal()) {
@@ -47,6 +48,7 @@ void stage1_main(unsigned long bist)
: "a" (bist) /* inputs */
);
fallback_image:
#endif
#endif
real_main(bist);

View File

@@ -111,7 +111,13 @@ clear_mtrrs:
/* Enable cache for our code in Flash because we do XIP here */
movl $MTRRphysBase_MSR(1), %ecx
xorl %edx, %edx
movl $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
#else
#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
#endif
movl $REAL_XIP_ROM_BASE, %eax
orl $MTRR_TYPE_WRBACK, %eax
wrmsr
movl $MTRRphysMask_MSR(1), %ecx

View File

@@ -27,6 +27,7 @@ void stage1_main(unsigned long bist)
{
unsigned int cpu_reset = 0;
#if !defined(CONFIG_TINY_BOOTBLOCK) || !CONFIG_TINY_BOOTBLOCK
#if CONFIG_USE_FALLBACK_IMAGE == 1
/* Is this a deliberate reset by the bios */
if (bios_reset_detected() && last_boot_normal()) {
@@ -47,6 +48,7 @@ void stage1_main(unsigned long bist)
: "a" (bist) /* inputs */
);
fallback_image:
#endif
#endif
real_main(bist);