addw3, bonw15: Set TBT GPIOs correctly

Change-Id: Iaca3d9de0cc6b8c07f1a9b9ae381aea729a4cd7d
This commit is contained in:
Jeremy Soller
2023-04-18 10:06:55 -06:00
parent b90e4da793
commit 202e918a3c
2 changed files with 3 additions and 3 deletions

View File

@ -244,7 +244,7 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_K1, NONE), PAD_NC(GPP_K1, NONE),
PAD_NC(GPP_K2, NONE), PAD_NC(GPP_K2, NONE),
PAD_CFG_GPO(GPP_K3, 1, PLTRST), // TBT_RTD3_PWR_EN_R PAD_CFG_GPO(GPP_K3, 1, PLTRST), // TBT_RTD3_PWR_EN_R
PAD_CFG_GPO(GPP_K4, 1, RSMRST), // TBT_FORCE_PWR_R PAD_CFG_GPO(GPP_K4, 0, RSMRST), // TBT_FORCE_PWR_R
PAD_NC(GPP_K5, NONE), PAD_NC(GPP_K5, NONE),
PAD_CFG_NF(GPP_K6, UP_20K, DEEP, NF2), // Not in schematic PAD_CFG_NF(GPP_K6, UP_20K, DEEP, NF2), // Not in schematic
PAD_CFG_NF(GPP_K7, DN_20K, DEEP, NF2), // Not in schematic PAD_CFG_NF(GPP_K7, DN_20K, DEEP, NF2), // Not in schematic

View File

@ -144,7 +144,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_F2, 0, DEEP), PAD_CFG_GPO(GPP_F2, 0, DEEP),
PAD_CFG_GPO(GPP_F3, 0, DEEP), PAD_CFG_GPO(GPP_F3, 0, DEEP),
PAD_CFG_GPO(GPP_F4, 0, DEEP), PAD_CFG_GPO(GPP_F4, 0, DEEP),
PAD_CFG_GPO(GPP_F5, 0, PLTRST), // GPP_F5_TBT_RTD3 PAD_CFG_GPO(GPP_F5, 1, PLTRST), // GPP_F5_TBT_RTD3
PAD_CFG_GPO(GPP_F6, 0, DEEP), PAD_CFG_GPO(GPP_F6, 0, DEEP),
PAD_CFG_GPO(GPP_F7, 0, DEEP), PAD_CFG_GPO(GPP_F7, 0, DEEP),
PAD_CFG_GPI(GPP_F8, NONE, DEEP), // GC6_FB_EN_PCH PAD_CFG_GPI(GPP_F8, NONE, DEEP), // GC6_FB_EN_PCH
@ -155,7 +155,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_F13, 0, DEEP), PAD_CFG_GPO(GPP_F13, 0, DEEP),
PAD_CFG_GPO(GPP_F14, 0, DEEP), // PS_ON# PAD_CFG_GPO(GPP_F14, 0, DEEP), // PS_ON#
PAD_CFG_GPI(GPP_F15, NONE, DEEP), // H_SKTOCC_N PAD_CFG_GPI(GPP_F15, NONE, DEEP), // H_SKTOCC_N
PAD_CFG_GPO(GPP_F16, 0, DEEP), // GPP_F16_TBT_RST# PAD_CFG_GPO(GPP_F16, 1, DEEP), // GPP_F16_TBT_RST#
PAD_CFG_GPO(GPP_F17, 0, DEEP), PAD_CFG_GPO(GPP_F17, 0, DEEP),
PAD_CFG_GPO(GPP_F18, 0, DEEP), // CCD_FW_WP# PAD_CFG_GPO(GPP_F18, 0, DEEP), // CCD_FW_WP#
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1), // NB_ENAVDD PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1), // NB_ENAVDD