soc/amd: Change Morgana codename to Phoenix

Now that the next generation of APUs is officially announced, we can
unmask morgana.

The chip formerly known as Morgana is actually Phoenix.

Surprise!

This patch just changes the name across the entire codebase.

Note that the fw.cfg file will stay pointing to the
3rdparty/amd_blobs/morgana/psp directory until the amd_blobs_repo is
updated.

Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Change-Id: Ie9492a30ae9ff9cd7e15e0f2d239c32190ad4956
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71731
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/vendorcode/amd/fsp/phoenix/FspUsb.h

@@ -1,7 +1,7 @@
 #ifndef __FSPUSB_H__
 #define __FSPUSB_H__
 
-/* TODO: Update for Morgana */
+/* TODO: Update for Phoenix */
 
 #include <FspUpd.h>
 

src/vendorcode/amd/fsp/phoenix/FspmUpd.h

@@ -4,7 +4,7 @@
  *
  */
 
-/* TODO: Update for Morgana */
+/* TODO: Update for Phoenix */
 
 #ifndef __FSPMUPD_H__
 #define __FSPMUPD_H__

src/vendorcode/amd/fsp/phoenix/include/bl_uapp/bl_syscall_public.h

@@ -27,7 +27,7 @@
  *
  ***************************************************************************/
 
-/* TODO: Update for Morgana */
+/* TODO: Update for Phoenix */
 
 #ifndef _BL_SYSCALL_PUBLIC_H_
 #define _BL_SYSCALL_PUBLIC_H_

src/vendorcode/amd/fsp/phoenix/platform_descriptors.h

@@ -5,7 +5,7 @@
  * connector types connected to the SOC.
  */
 
-/* TODO: Update for Morgana */
+/* TODO: Update for Phoenix */
 
 #ifndef PI_PLATFORM_DESCRIPTORS_H
 #define PI_PLATFORM_DESCRIPTORS_H
@@ -164,11 +164,11 @@ typedef struct __packed {
 } fsp_ddi_descriptor;
 
 /*
- * Morgana DXIO Descriptor: Used for assigning lanes to PCIe engines, configure
+ * Phoenix DXIO Descriptor: Used for assigning lanes to PCIe engines, configure
  * bifurcation and other settings. Beware that the lane numbers in here are the
  * logical and not the physical lane numbers!
  *
- * Morgana DXIO logical lane to physical PCIe lane mapping:
+ * Phoenix DXIO logical lane to physical PCIe lane mapping:
  *
  *   logical | physical
  * ----------|------------