soc/intel/skylake: Set PsysPL2 MSR

BUG=b:7473486, b:35775024
BRANCH=None
TEST=On bootup make sure PL2 and PsysPL2 values set
     properly (through debug output)

Change-Id: I847a8458382e7db1689b426f32ff2dcbc5a0899c
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://review.coreboot.org/20418
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

src/soc/intel/skylake/chip.h

@@ -97,6 +97,9 @@ struct soc_intel_skylake_config {
 	/* PL2 Override value in Watts */
 	u32 tdp_pl2_override;
 
+	/* SysPL2 Value in Watts */
+	u32 tdp_psyspl2;
+
 	/*
 	 * The following fields come from FspUpdVpd.h.
 	 * These are configuration values that are passed to FSP during