soc/intel/jasperlake: Add IGD, MCH Device ID

Add IGD Device ID and MCH Device ID for Jasperlake.
Reference is taken from Jasperlake EDS volume 1(Document Number:
613601).

TEST=Build and boot Jasperlake platform.

Change-Id: I00ee7950ffa378b428a76bf367a9a05ab287e7ed
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45481
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
This commit is contained in:
Krishna Prasad Bhat
2020-09-17 19:42:39 +05:30
committed by Subrata Banik
parent 8e60571f6e
commit 20f580b6f9
4 changed files with 6 additions and 0 deletions

View File

@@ -3638,6 +3638,7 @@
#define PCI_DEVICE_ID_INTEL_JSL_GT1 0x4E51
#define PCI_DEVICE_ID_INTEL_JSL_GT2 0x4E71
#define PCI_DEVICE_ID_INTEL_JSL_GT3 0x4E61
#define PCI_DEVICE_ID_INTEL_JSL_GT4 0x4E55
#define PCI_DEVICE_ID_INTEL_ADL_GT0 0x46ff
#define PCI_DEVICE_ID_INTEL_ADL_GT1 0x4600
@@ -3729,6 +3730,7 @@
#define PCI_DEVICE_ID_INTEL_JSL_ID_2 0x4e26
#define PCI_DEVICE_ID_INTEL_JSL_ID_3 0x4e12
#define PCI_DEVICE_ID_INTEL_JSL_ID_4 0x4e14
#define PCI_DEVICE_ID_INTEL_JSL_ID_5 0x4e24
#define PCI_DEVICE_ID_INTEL_ADL_S_ID_1 0x4660
#define PCI_DEVICE_ID_INTEL_ADL_S_ID_2 0x4664