console: Split console_init()
Splitting the version prompt satisfies some requirements ROMCC sets for the order in which we include source files. Also GDB stub will need console hardware before entering main(). Change-Id: Ibb445a2f8cfb440d9dd69cade5f0ea41fb606f50 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5331 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Kyösti Mälkki
committed by
Patrick Georgi
Patrick Georgi
parent
d53d96dddd
commit
21333f96c7
@ -1,5 +1,5 @@
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ramstage-y += printk.c
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ramstage-y += console.c
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ramstage-y += init.c console.c
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ramstage-y += vtxprintf.c
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ramstage-y += vsprintf.c
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ramstage-y += post.c
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@ -9,12 +9,12 @@ smm-$(CONFIG_DEBUG_SMI) += vtxprintf.c printk.c
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smm-$(CONFIG_SMM_TSEG) += die.c
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romstage-$(CONFIG_EARLY_CONSOLE) += vtxprintf.c
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romstage-y += console.c
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romstage-$(CONFIG_EARLY_CONSOLE) += init.c console.c
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romstage-y += post.c
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romstage-y += die.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += vtxprintf.c
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bootblock-y += console.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += init.c console.c
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bootblock-y += die.c
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ramstage-$(CONFIG_CONSOLE_SERIAL) += uart_console.c
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@ -25,6 +25,6 @@ ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
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ramstage-$(CONFIG_CONSOLE_QEMU_DEBUGCON) += qemu_debugcon_console.c
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$(obj)/console/console.ramstage.o : $(obj)/build.h
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$(obj)/console/console.romstage.o : $(obj)/build.h
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$(obj)/console/console.bootblock.o : $(obj)/build.h
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$(obj)/console/init.ramstage.o : $(obj)/build.h
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$(obj)/console/init.romstage.o : $(obj)/build.h
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$(obj)/console/init.bootblock.o : $(obj)/build.h
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@ -24,30 +24,13 @@
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#include <console/ne2k.h>
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#include <console/spkmodem.h>
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#include <build.h>
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#include <arch/hlt.h>
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#include <arch/io.h>
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#if CONFIG_EARLY_PCI_BRIDGE
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/* FIXME: ROMCC chokes on PCI headers. */
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#include <device/pci.h>
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#endif
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#ifndef __PRE_RAM__
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#include <string.h>
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#include <types.h>
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#include <option.h>
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/* initialize the console */
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void console_init(void)
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void console_hw_init(void)
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{
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struct console_driver *driver;
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if(get_option(&console_loglevel, "debug_level") != CB_SUCCESS)
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console_loglevel=CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
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#if CONFIG_EARLY_PCI_BRIDGE
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pci_early_bridge_init();
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#endif
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for(driver = console_drivers; driver < econsole_drivers; driver++) {
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if (!driver->init)
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continue;
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@ -104,14 +87,8 @@ int console_tst_byte(void)
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#else // __PRE_RAM__ ^^^ NOT defined vvv defined
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void console_init(void)
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void console_hw_init(void)
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{
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#if defined(__BOOT_BLOCK__) && CONFIG_BOOTBLOCK_CONSOLE || \
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!defined(__BOOT_BLOCK__) && CONFIG_EARLY_CONSOLE
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#if CONFIG_EARLY_PCI_BRIDGE
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pci_early_bridge_init();
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#endif
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#if CONFIG_CONSOLE_SERIAL
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uart_init();
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#endif
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@ -127,16 +104,5 @@ void console_init(void)
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#if CONFIG_CONSOLE_USB && CONFIG_USBDEBUG_IN_ROMSTAGE && !defined(__BOOT_BLOCK__)
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usbdebug_init();
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#endif
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static const char console_test[] =
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"\n\ncoreboot-"
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COREBOOT_VERSION
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COREBOOT_EXTRA_VERSION
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" "
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COREBOOT_BUILD
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" starting...\n";
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print_info(console_test);
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#endif /* CONFIG_EARLY_CONSOLE */
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}
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#endif
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56
src/console/init.c
Normal file
56
src/console/init.c
Normal file
@ -0,0 +1,56 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2003 Eric Biederman
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#include <build.h>
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#include <console/console.h>
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#include <console/uart.h>
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#include <option.h>
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#if CONFIG_EARLY_PCI_BRIDGE
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/* FIXME: ROMCC chokes on PCI headers. */
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#include <device/pci.h>
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#endif
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void console_init(void)
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{
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#if !defined(__PRE_RAM__)
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if(get_option(&console_loglevel, "debug_level") != CB_SUCCESS)
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console_loglevel=CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
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#endif
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#if CONFIG_EARLY_PCI_BRIDGE
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pci_early_bridge_init();
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#endif
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console_hw_init();
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#if defined(__PRE_RAM__)
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static const char console_test[] =
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"\n\ncoreboot-"
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COREBOOT_VERSION
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COREBOOT_EXTRA_VERSION
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" "
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COREBOOT_BUILD
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" starting...\n";
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print_info(console_test);
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#endif
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}
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