diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb
index 7a7855c877..016d3d4862 100644
--- a/src/soc/intel/alderlake/chipset.cb
+++ b/src/soc/intel/alderlake/chipset.cb
@@ -91,31 +91,31 @@ chip soc/intel/alderlake
 	}"
 
 	register "power_limits_config[RPL_HX_8_16_55W_CORE]" = "{
-		.tdp_p1_override = 55,
+		.tdp_pl1_override = 55,
 		.tdp_pl2_override = 130,
 		.tdp_pl4 = 200,
 	}"
 
 	register "power_limits_config[RPL_HX_8_12_55W_CORE]" = "{
-		.tdp_p1_override = 55,
+		.tdp_pl1_override = 55,
 		.tdp_pl2_override = 130,
 		.tdp_pl4 = 200,
 	}"
 
 	register "power_limits_config[RPL_HX_8_8_55W_CORE]" = "{
-		.tdp_p1_override = 55,
+		.tdp_pl1_override = 55,
 		.tdp_pl2_override = 130,
 		.tdp_pl4 = 200,
 	}"
 
 	register "power_limits_config[RPL_HX_6_8_55W_CORE]" = "{
-		.tdp_p1_override = 55,
+		.tdp_pl1_override = 55,
 		.tdp_pl2_override = 130,
 		.tdp_pl4 = 200,
 	}"
 
 	register "power_limits_config[RPL_HX_6_4_55W_CORE]" = "{
-		.tdp_p1_override = 55,
+		.tdp_pl1_override = 55,
 		.tdp_pl2_override = 130,
 		.tdp_pl4 = 200,
 	}"