cpu: get rid of socket source code

None of the sockets has actual configuration options, so the source
for them is only cosmetical boilerplate. Hence, drop it. This reduces
the sockets to be selectors for certain CPU types, which will be dropped
in future commits, and mainboards will select their CPUs directly rather
than through an additional layer of indirection (sockets)

Change-Id: I0f52a65838875a73531ef8c92a171bb1a35be96e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9797
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>

src/cpu/intel/socket_441/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_441.c
 subdirs-y += ../model_106cx
 subdirs-y += ../../x86/tsc
 subdirs-y += ../../x86/mtrr

src/cpu/intel/socket_441/socket_441.c

@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <device/device.h>
-
-struct chip_operations cpu_intel_socket_441_ops = {
-	CHIP_NAME("Socket 441 CPU")
-};

src/cpu/intel/socket_BGA956/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_BGA956.c
 subdirs-y += ../model_1067x
 subdirs-y += ../../x86/tsc
 subdirs-y += ../../x86/mtrr

src/cpu/intel/socket_BGA956/socket_BGA956.c

@@ -1,5 +0,0 @@
-#include <device/device.h>
-
-struct chip_operations cpu_intel_socket_BGA956_ops = {
-	CHIP_NAME("Socket BGA956 CPU")
-};

src/cpu/intel/socket_FC_PGA370/Makefile.inc

@@ -18,7 +18,6 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 ##
 
-ramstage-y += socket_FC_PGA370.c
 subdirs-y += ../model_68x
 subdirs-y += ../../x86/tsc
 subdirs-y += ../../x86/mtrr

src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c

@@ -1,25 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Joseph Smith <joe@settoplinux.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <device/device.h>
-
-struct chip_operations cpu_intel_socket_FC_PGA370_ops = {
-	CHIP_NAME("(FC)PGA370 CPU")
-};

src/cpu/intel/socket_LGA1155/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_LGA1155.c
 subdirs-y += ../../x86/mtrr
 subdirs-y += ../../x86/lapic
 subdirs-y += ../../x86/cache

src/cpu/intel/socket_LGA1155/socket_LGA1155.c

@@ -1,5 +0,0 @@
-#include <device/device.h>
-
-struct chip_operations cpu_intel_socket_LGA1155_ops = {
-	CHIP_NAME("Socket LGA1155 CPU")
-};

src/cpu/intel/socket_LGA771/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_LGA771.c
 subdirs-y += ../model_6ex
 subdirs-y += ../model_6fx
 subdirs-y += ../../x86/tsc

src/cpu/intel/socket_LGA771/socket_LGA771.c

@@ -1,6 +0,0 @@
-#include <device/device.h>
-
-
-struct chip_operations cpu_intel_socket_LGA771_ops = {
-	CHIP_NAME("Socket LGA771 CPU")
-};

src/cpu/intel/socket_LGA775/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_LGA775.c
 subdirs-y += ../model_6ex
 subdirs-y += ../model_6fx
 subdirs-y += ../model_f3x

src/cpu/intel/socket_LGA775/socket_LGA775.c

@@ -1,5 +0,0 @@
-#include <device/device.h>
-
-struct chip_operations cpu_intel_socket_LGA775_ops = {
-	CHIP_NAME("Socket LGA775 CPU")
-};

src/cpu/intel/socket_PGA370/Makefile.inc

@@ -18,7 +18,6 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 ##
 
-ramstage-y += socket_PGA370.c
 subdirs-y += ../model_6xx
 subdirs-y += ../../x86/tsc
 subdirs-y += ../../x86/mtrr

src/cpu/intel/socket_PGA370/socket_PGA370.c

@@ -1,5 +0,0 @@
-#include <device/device.h>
-
-struct chip_operations cpu_intel_socket_PGA370_ops = {
-	CHIP_NAME("Socket PGA370 CPU")
-};

src/cpu/intel/socket_mFCBGA479/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_mFCBGA479.c
 subdirs-y += ../model_6bx
 subdirs-y += ../../x86/tsc
 subdirs-y += ../../x86/mtrr

src/cpu/intel/socket_mFCBGA479/socket_mFCBGA479.c

@@ -1,5 +0,0 @@
-#include <device/device.h>
-
-struct chip_operations cpu_intel_socket_mFCBGA479_ops = {
-	CHIP_NAME("Micro-FCBGA 479 CPU")
-};

src/cpu/intel/socket_mFCPGA478/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_mFCPGA478.c
 subdirs-y += ../model_69x
 subdirs-y += ../model_6dx
 subdirs-y += ../model_6ex

src/cpu/intel/socket_mFCPGA478/socket_mFCPGA478.c

@@ -1,6 +0,0 @@
-#include <device/device.h>
-
-
-struct chip_operations cpu_intel_socket_mFCPGA478_ops = {
-	CHIP_NAME("Socket mFCPGA478 CPU")
-};

src/cpu/intel/socket_mPGA478/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_mPGA478.c
 subdirs-y += ../model_69x
 subdirs-y += ../model_6dx
 subdirs-y += ../../x86/tsc

src/cpu/intel/socket_mPGA478/socket_mPGA478.c

@@ -1,6 +0,0 @@
-#include <device/device.h>
-
-
-struct chip_operations cpu_intel_socket_mPGA478_ops = {
-	CHIP_NAME("Socket mPGA478 CPU")
-};

src/cpu/intel/socket_mPGA479M/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_mPGA479M.c
 subdirs-y += ../model_69x
 subdirs-y += ../model_6dx
 subdirs-y += ../model_f2x

src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c

@@ -1,6 +0,0 @@
-#include <device/device.h>
-
-
-struct chip_operations cpu_intel_socket_mPGA479M_ops = {
-	CHIP_NAME("Socket mPGA479M CPU")
-};

src/cpu/intel/socket_mPGA603/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_mPGA603_400Mhz.c
 subdirs-y += ../model_f0x
 subdirs-y += ../model_f1x
 subdirs-y += ../model_f2x

src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c

@@ -1,6 +0,0 @@
-#include <device/device.h>
-
-
-struct chip_operations cpu_intel_socket_mPGA603_ops = {
-	CHIP_NAME("Socket mPGA603 400Mhz CPU")
-};

src/cpu/intel/socket_mPGA604/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_mPGA604.c
 subdirs-y += ../model_f2x
 subdirs-y += ../model_f3x
 subdirs-y += ../model_f4x

src/cpu/intel/socket_mPGA604/socket_mPGA604.c

@@ -1,6 +0,0 @@
-#include <device/device.h>
-
-
-struct chip_operations cpu_intel_socket_mPGA604_ops = {
-	CHIP_NAME("Socket mPGA604 CPU")
-};

src/cpu/intel/socket_rPGA988B/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_rPGA988B.c
 subdirs-y += ../../x86/tsc
 subdirs-y += ../../x86/mtrr
 subdirs-y += ../../x86/lapic

src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c

@@ -1,5 +0,0 @@
-#include <device/device.h>
-
-struct chip_operations cpu_intel_socket_rPGA988B_ops = {
-	CHIP_NAME("Socket rPGA988B CPU")
-};

src/cpu/intel/socket_rPGA989/Makefile.inc

@@ -1,4 +1,3 @@
-ramstage-y += socket_rPGA989.c
 subdirs-y += ../../x86/tsc
 subdirs-y += ../../x86/mtrr
 subdirs-y += ../../x86/lapic

src/cpu/intel/socket_rPGA989/socket_rPGA989.c

@@ -1,5 +0,0 @@
-#include <device/device.h>
-
-struct chip_operations cpu_intel_socket_rPGA989_ops = {
-	CHIP_NAME("Socket rPGA989 CPU")
-};