From 246b943056a9c91bd6eac9412d460122c34c6b4a Mon Sep 17 00:00:00 2001 From: Jeremy Compostella Date: Fri, 19 May 2023 10:04:47 -0700 Subject: [PATCH] soc/intel/mtl/acpi/xhci: Add clock gating support Implement PS0 and PS3 methods to support xHCI clock gating in S0ix suspend and resume. BUG=b:283989367 TEST=S0iX test passed Change-Id: Ia5b72b81fd1c0d0b7b90f8d9cbf6ef4aa9da9743 Signed-off-by: Jeremy Compostella Reviewed-on: https://review.coreboot.org/c/coreboot/+/75401 Tested-by: build bot (Jenkins) Reviewed-by: Sukumar Ghorai Reviewed-by: Subrata Banik --- src/soc/intel/meteorlake/acpi/xhci.asl | 6 ++++-- src/soc/intel/meteorlake/include/soc/pcr_ids.h | 1 + 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/meteorlake/acpi/xhci.asl b/src/soc/intel/meteorlake/acpi/xhci.asl index a2ddebd9ed..38850508cb 100644 --- a/src/soc/intel/meteorlake/acpi/xhci.asl +++ b/src/soc/intel/meteorlake/acpi/xhci.asl @@ -16,12 +16,14 @@ Device (XHCI) Method (_PS0, 0, Serialized) { - + /* Disable Clock Gating */ + ^^PCRA (PID_XHCI, 0x0, ~(1 << 3)) } Method (_PS3, 0, Serialized) { - + /* Enable Clock Gating */ + ^^PCRO (PID_XHCI, 0x0, 1 << 3) } /* Root Hub for Meteorlake */ diff --git a/src/soc/intel/meteorlake/include/soc/pcr_ids.h b/src/soc/intel/meteorlake/include/soc/pcr_ids.h index 0ef9f30f8d..1b0eda3a5d 100644 --- a/src/soc/intel/meteorlake/include/soc/pcr_ids.h +++ b/src/soc/intel/meteorlake/include/soc/pcr_ids.h @@ -28,5 +28,6 @@ #define PID_ISCLK 0x64 #define PID_DMI 0x88 #define PID_IOM 0xAA +#define PID_XHCI 0x3A #endif