Disable PM timer to prevent TCO watchdog timeout on resume from suspend
Change-Id: I46047d5fe36320fbb4673ac92f523d8bb2832f0c
This commit is contained in:
@@ -46,8 +46,8 @@ chip soc/intel/tigerlake
|
|||||||
register "gen4_dec" = "0x00fc0F01"
|
register "gen4_dec" = "0x00fc0F01"
|
||||||
|
|
||||||
# Finalize (soc/intel/tigerlake/finalize.c)
|
# Finalize (soc/intel/tigerlake/finalize.c)
|
||||||
# PM Timer Enabled
|
# PM Timer Disabled
|
||||||
register "PmTimerDisabled" = "0"
|
register "PmTimerDisabled" = "1"
|
||||||
|
|
||||||
# FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c)
|
# FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c)
|
||||||
# DDIA is eDP
|
# DDIA is eDP
|
||||||
|
@@ -46,8 +46,8 @@ chip soc/intel/tigerlake
|
|||||||
register "gen4_dec" = "0x00fc0F01"
|
register "gen4_dec" = "0x00fc0F01"
|
||||||
|
|
||||||
# Finalize (soc/intel/tigerlake/finalize.c)
|
# Finalize (soc/intel/tigerlake/finalize.c)
|
||||||
# PM Timer Enabled
|
# PM Timer Disabled
|
||||||
register "PmTimerDisabled" = "0"
|
register "PmTimerDisabled" = "1"
|
||||||
|
|
||||||
# FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c)
|
# FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c)
|
||||||
# DDIA is eDP
|
# DDIA is eDP
|
||||||
|
Reference in New Issue
Block a user