Disable PM timer to prevent TCO watchdog timeout on resume from suspend

Change-Id: I46047d5fe36320fbb4673ac92f523d8bb2832f0c
This commit is contained in:
Jeremy Soller
2020-11-13 09:14:39 -07:00
parent 69ed89d502
commit 247a002d4a
2 changed files with 4 additions and 4 deletions

View File

@@ -46,8 +46,8 @@ chip soc/intel/tigerlake
register "gen4_dec" = "0x00fc0F01"
# Finalize (soc/intel/tigerlake/finalize.c)
# PM Timer Enabled
register "PmTimerDisabled" = "0"
# PM Timer Disabled
register "PmTimerDisabled" = "1"
# FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c)
# DDIA is eDP

View File

@@ -46,8 +46,8 @@ chip soc/intel/tigerlake
register "gen4_dec" = "0x00fc0F01"
# Finalize (soc/intel/tigerlake/finalize.c)
# PM Timer Enabled
register "PmTimerDisabled" = "0"
# PM Timer Disabled
register "PmTimerDisabled" = "1"
# FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c)
# DDIA is eDP