soc/amd/stoneyridge: Move GPIO support to common
The banked GPIO functionality in the AcpiMmio block has been consistent since the Mullins product. Move the basic support into a common directory. Each product's pin availability, MUXes, and other details must remain specific to the product. The relocated source also drops the weak configure_gevent_smi() that reports SMI is not available. The stoneyridge port relies on SMI to do its initialization, similar to modern soc/intel devices. This is the plan for future soc/amd ports, so make a missing function a build error instead of a runtime warning. BUG=b:131682806 Change-Id: I9cda00210a74de2bd1308ad43e2b867d24a67845 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32651 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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Martin Roth
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eb5b0d05a7
commit
251d305e73
@@ -317,9 +317,9 @@ static void acpigen_soc_get_gpio_in_local5(uintptr_t addr)
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static int acpigen_soc_get_gpio_val(unsigned int gpio_num, uint32_t mask)
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{
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if (gpio_num >= GPIO_TOTAL_PINS) {
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if (gpio_num >= SOC_GPIO_TOTAL_PINS) {
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printk(BIOS_WARNING, "Warning: Pin %d should be smaller than"
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" %d\n", gpio_num, GPIO_TOTAL_PINS);
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" %d\n", gpio_num, SOC_GPIO_TOTAL_PINS);
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return -1;
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}
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uintptr_t addr = (uintptr_t) gpio_get_address(gpio_num);
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@@ -347,9 +347,9 @@ static int acpigen_soc_get_gpio_val(unsigned int gpio_num, uint32_t mask)
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static int acpigen_soc_set_gpio_val(unsigned int gpio_num, uint32_t val)
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{
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if (gpio_num >= GPIO_TOTAL_PINS) {
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if (gpio_num >= SOC_GPIO_TOTAL_PINS) {
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printk(BIOS_WARNING, "Warning: Pin %d should be smaller than"
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" %d\n", gpio_num, GPIO_TOTAL_PINS);
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" %d\n", gpio_num, SOC_GPIO_TOTAL_PINS);
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return -1;
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}
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uintptr_t addr = (uintptr_t) gpio_get_address(gpio_num);
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