src/cpu/power9: add file structure for power9, implement SCOM access

Change-Id: Ib555ce51294c94b22d9a7c0db84d38d7928f7015
Signed-off-by: Igor Bagnucki <igor.bagnucki@3mdeb.com>
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57078
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>

src/arch/ppc64/include/arch/byteorder.h

@@ -5,4 +5,16 @@
 
 #define __BIG_ENDIAN 4321
 
+#define PPC_BIT(bit)		(0x8000000000000000UL >> (bit))
+#define PPC_BITMASK(bs, be)	((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
+
+#ifndef __ASSEMBLER__
+
+#include <types.h>
+#define PPC_SHIFT(val, lsb)	(((uint64_t)(val)) << (63 - (lsb)))
+
+#else
+#define PPC_SHIFT(val, lsb)	((val) << (63 - (lsb)))
+#endif
+
 #endif /* _BYTEORDER_H */

src/arch/ppc64/include/arch/io.h

@@ -9,6 +9,7 @@
 #define MMIO_GROUP0_CHIP0_LPC_BASE_ADDR 0x8006030000000000
 #define LPCHC_IO_SPACE 0xD0010000
 #define LPC_BASE_ADDR (MMIO_GROUP0_CHIP0_LPC_BASE_ADDR + LPCHC_IO_SPACE)
+#define MMIO_GROUP0_CHIP0_SCOM_BASE_ADDR 0x800603FC00000000
 
 /* Enforce In-order Execution of I/O */
 static inline void eieio(void)