northbridge/intel/gm45: transation away from device_t
Replace the use of the old device_t definition inside northbridge/intel/gm45. The patch has been tested both with the arch/io.h definition of device_t enabled and disabled in order to ensure compatibility while the transaction takes place. Change-Id: I87754799f922cf241fb456071bac04e6fe1eab34 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/16402 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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Martin Roth
parent
823f1a9bbf
commit
25f75b28e4
@@ -30,9 +30,9 @@
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/* The PEG settings have to be set before ASPM is setup on DMI. */
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static void enable_igd(const sysinfo_t *const sysinfo, const int no_peg)
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{
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const device_t mch_dev = PCI_DEV(0, 0, 0);
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const device_t peg_dev = PCI_DEV(0, 1, 0);
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const device_t igd_dev = PCI_DEV(0, 2, 0);
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const pci_devfn_t mch_dev = PCI_DEV(0, 0, 0);
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const pci_devfn_t peg_dev = PCI_DEV(0, 1, 0);
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const pci_devfn_t igd_dev = PCI_DEV(0, 2, 0);
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u16 reg16;
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u32 reg32;
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@@ -110,7 +110,7 @@ static void enable_igd(const sysinfo_t *const sysinfo, const int no_peg)
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static void disable_igd(const sysinfo_t *const sysinfo)
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{
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const device_t mch_dev = PCI_DEV(0, 0, 0);
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const pci_devfn_t mch_dev = PCI_DEV(0, 0, 0);
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printk(BIOS_DEBUG, "Disabling IGD.\n");
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@@ -131,7 +131,7 @@ static void disable_igd(const sysinfo_t *const sysinfo)
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void init_igd(const sysinfo_t *const sysinfo)
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{
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const device_t mch_dev = PCI_DEV(0, 0, 0);
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const pci_devfn_t mch_dev = PCI_DEV(0, 0, 0);
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const u8 capid = pci_read_config8(mch_dev, D0F0_CAPID0 + 4);
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if (!sysinfo->enable_igd || (capid & (1 << (33 - 32))))
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@@ -142,7 +142,7 @@ void init_igd(const sysinfo_t *const sysinfo)
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void igd_compute_ggc(sysinfo_t *const sysinfo)
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{
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const device_t mch_dev = PCI_DEV(0, 0, 0);
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const pci_devfn_t mch_dev = PCI_DEV(0, 0, 0);
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const u32 capid = pci_read_config32(mch_dev, D0F0_CAPID0 + 4);
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if (!sysinfo->enable_igd || (capid & (1 << (33 - 32))))
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