From 26b1a5f62bb25babfb2a8313db0defd84da681ab Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20B=C3=BCchler?= Date: Sat, 10 Jul 2021 13:39:57 +0200 Subject: [PATCH] mb/acer/g43t-am3: Rework mainboard for variant mechanism MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In preparation for CB:83968, rework the configuration files and move files specific to G43T-AM3 to its own variant directory. Change-Id: I425852f4bdacf7cb6688a5fb845ac3001373262e Signed-off-by: Michael Büchler Signed-off-by: Julia Kittlinger Reviewed-on: https://review.coreboot.org/c/coreboot/+/57764 Reviewed-by: Felix Singer Tested-by: build bot (Jenkins) --- src/mainboard/acer/g43t-am3/Kconfig | 13 ++- src/mainboard/acer/g43t-am3/Makefile.mk | 8 +- .../acer/g43t-am3/variants/g43t-am3/data.vbt | Bin 0 -> 1899 bytes .../g43t-am3/variants/g43t-am3/early_init.c | 33 ++++++ .../acer/g43t-am3/variants/g43t-am3/gpio.c | 101 ++++++++++++++++++ .../g43t-am3/include/acpi/superio.asl | 18 ++++ .../variants/g43t-am3/overridetree.cb | 6 ++ 7 files changed, 173 insertions(+), 6 deletions(-) create mode 100644 src/mainboard/acer/g43t-am3/variants/g43t-am3/data.vbt create mode 100644 src/mainboard/acer/g43t-am3/variants/g43t-am3/early_init.c create mode 100644 src/mainboard/acer/g43t-am3/variants/g43t-am3/gpio.c create mode 100644 src/mainboard/acer/g43t-am3/variants/g43t-am3/include/acpi/superio.asl create mode 100644 src/mainboard/acer/g43t-am3/variants/g43t-am3/overridetree.cb diff --git a/src/mainboard/acer/g43t-am3/Kconfig b/src/mainboard/acer/g43t-am3/Kconfig index 1d4fd53f97..34d191f4d5 100644 --- a/src/mainboard/acer/g43t-am3/Kconfig +++ b/src/mainboard/acer/g43t-am3/Kconfig @@ -9,7 +9,7 @@ config BOARD_SPECIFIC_OPTIONS select SOUTHBRIDGE_INTEL_I82801JX select SUPERIO_ITE_IT8720F select HAVE_ACPI_TABLES - select BOARD_ROMSIZE_KB_2048 + select BOARD_ROMSIZE_KB_2048 if BOARD_ACER_G43T_AM3 select PCIEXP_ASPM select PCIEXP_CLK_PM select HAVE_OPTION_TABLE @@ -22,12 +22,19 @@ config BOARD_SPECIFIC_OPTIONS config VGA_BIOS_ID string - default "8086,2e22" + default "8086,2e22" if BOARD_ACER_G43T_AM3 config MAINBOARD_DIR default "acer/g43t-am3" +config VARIANT_DIR + default "g43t-am3" if BOARD_ACER_G43T_AM3 + config MAINBOARD_PART_NUMBER - default "G43T-AM3" + default "G43T-AM3" if BOARD_ACER_G43T_AM3 + +config OVERRIDE_DEVICETREE + string + default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" endif # BOARD_ACER_G43T_AM3 diff --git a/src/mainboard/acer/g43t-am3/Makefile.mk b/src/mainboard/acer/g43t-am3/Makefile.mk index ede8d87e92..3e28ba4982 100644 --- a/src/mainboard/acer/g43t-am3/Makefile.mk +++ b/src/mainboard/acer/g43t-am3/Makefile.mk @@ -1,9 +1,11 @@ # SPDX-License-Identifier: GPL-2.0-only ramstage-y += cstates.c -romstage-y += gpio.c +romstage-y += variants/$(VARIANT_DIR)/gpio.c -bootblock-y += early_init.c -romstage-y += early_init.c +bootblock-y += variants/$(VARIANT_DIR)/early_init.c +romstage-y += variants/$(VARIANT_DIR)/early_init.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads + +CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include diff --git a/src/mainboard/acer/g43t-am3/variants/g43t-am3/data.vbt b/src/mainboard/acer/g43t-am3/variants/g43t-am3/data.vbt new file mode 100644 index 0000000000000000000000000000000000000000..646adbae1bae7ebb0b569802fb07882cafd13c06 GIT binary patch literal 1899 zcmd6nO>7%Q6vzLwvmdT&yLK^+69P<7Rk^51H%??i2x8YCt+(CQu5F@HRcexYRjL{q zxhaBE3`C*_C_U!T0}>KKoH%gg&?8c%swcz&2_y~(5aNi0Am+{NCQ)fngy6s%zxlnH zdGqGY?062&m)fH09`~!hd$KB&bYSC(^%&I;OUbLZE>zsMd!gjl%O}N69Kdtd#*aV; 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// GPIO set 1 + ite_reg_write(GPIO_DEV, 0x26, 0x0c); // GPIO set 2 + ite_reg_write(GPIO_DEV, 0x27, 0x70); // GPIO set 3 + ite_reg_write(GPIO_DEV, 0x28, 0x40); // GPIO set 4 + ite_reg_write(GPIO_DEV, 0x29, 0x00); // GPIO set 5 + + /* Enable 3VSB during Suspend-to-RAM */ + ite_enable_3vsbsw(GPIO_DEV); + + /* Delay PWROK2 after 3VSBSW# during resume from Suspend-to-RAM */ + ite_delay_pwrgd3(GPIO_DEV); +} + +void mb_get_spd_map(u8 spd_map[4]) +{ + spd_map[0] = 0x50; + spd_map[1] = 0x51; + spd_map[2] = 0x52; + spd_map[3] = 0x53; +} diff --git a/src/mainboard/acer/g43t-am3/variants/g43t-am3/gpio.c b/src/mainboard/acer/g43t-am3/variants/g43t-am3/gpio.c new file mode 100644 index 0000000000..38239baf79 --- /dev/null +++ b/src/mainboard/acer/g43t-am3/variants/g43t-am3/gpio.c @@ -0,0 +1,101 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_GPIO, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_GPIO, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_GPIO, + .gpio20 = GPIO_MODE_GPIO, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_INPUT, + .gpio9 = GPIO_DIR_OUTPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio14 = GPIO_DIR_INPUT, + .gpio17 = GPIO_DIR_INPUT, + .gpio18 = GPIO_DIR_OUTPUT, + .gpio20 = GPIO_DIR_OUTPUT, + .gpio27 = GPIO_DIR_OUTPUT, + .gpio28 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio9 = GPIO_LEVEL_HIGH, + .gpio18 = GPIO_LEVEL_HIGH, + .gpio20 = GPIO_LEVEL_LOW, + .gpio27 = GPIO_LEVEL_LOW, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio6 = GPIO_INVERT, + .gpio13 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { + .gpio18 = GPIO_BLINK, + +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_GPIO, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_NATIVE, + .gpio36 = GPIO_MODE_NATIVE, + .gpio37 = GPIO_MODE_NATIVE, + .gpio38 = GPIO_MODE_NATIVE, + .gpio39 = GPIO_MODE_NATIVE, + .gpio48 = GPIO_MODE_NATIVE, + .gpio49 = GPIO_MODE_GPIO, + .gpio56 = GPIO_MODE_GPIO, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio32 = GPIO_DIR_OUTPUT, + .gpio33 = GPIO_DIR_INPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio49 = GPIO_DIR_OUTPUT, + .gpio56 = GPIO_DIR_INPUT, + .gpio57 = GPIO_DIR_INPUT, + .gpio60 = GPIO_DIR_OUTPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio32 = GPIO_LEVEL_HIGH, + .gpio49 = GPIO_LEVEL_HIGH, + .gpio60 = GPIO_LEVEL_LOW, +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + }, + +}; diff --git a/src/mainboard/acer/g43t-am3/variants/g43t-am3/include/acpi/superio.asl b/src/mainboard/acer/g43t-am3/variants/g43t-am3/include/acpi/superio.asl new file mode 100644 index 0000000000..9f3900b86c --- /dev/null +++ b/src/mainboard/acer/g43t-am3/variants/g43t-am3/include/acpi/superio.asl @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#undef SUPERIO_DEV +#undef SUPERIO_PNP_BASE +#undef IT8720F_SHOW_SP1 +#undef IT8720F_SHOW_SP2 +#undef IT8720F_SHOW_EC +#undef IT8720F_SHOW_KBCK +#undef IT8720F_SHOW_KBCM +#undef IT8720F_SHOW_GPIO +#undef IT8720F_SHOW_CIR +#define SUPERIO_DEV SIO0 +#define SUPERIO_PNP_BASE 0x2e +#define IT8720F_SHOW_EC 1 +#define IT8720F_SHOW_KBCK 1 +#define IT8720F_SHOW_KBCM 1 +#define IT8720F_SHOW_GPIO 1 +#include diff --git a/src/mainboard/acer/g43t-am3/variants/g43t-am3/overridetree.cb b/src/mainboard/acer/g43t-am3/variants/g43t-am3/overridetree.cb new file mode 100644 index 0000000000..01ab8251f5 --- /dev/null +++ b/src/mainboard/acer/g43t-am3/variants/g43t-am3/overridetree.cb @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +chip northbridge/intel/x4x # Northbridge + device domain 0 on # PCI domain + end +end