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soc/intel/baytrail: Align whitespace and comments

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This reduces the differences between Bay Trail and Braswell.

Tested with BUILD_TIMELESS=1, Google Ninja remains identical.

Change-Id: Idfdb1e6ec9bd0c1a11ef36ce0434ed5e12895187
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43186
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
This commit is contained in:
Angel Pons
2020-07-07 17:17:51 +02:00
parent b5320b2dc1
commit 26b49cc9a3
22 changed files with 331 additions and 305 deletions
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14
src/soc/intel/baytrail/cpu.c
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@@ -35,10 +35,11 @@ static void baytrail_core_init(struct device *cpu)
{
printk(BIOS_DEBUG, "Init BayTrail core.\n");
/* On bay trail the turbo disable bit is actually scoped at building
* block level -- not package. For non-bsp cores that are within a
* building block enable turbo. The cores within the BSP's building
* block will just see it already enabled and move on. */
/*
* The turbo disable bit is actually scoped at building block level -- not package.
* For non-BSP cores that are within a building block, enable turbo. The cores within
* the BSP's building block will just see it already enabled and move on.
*/
if (lapicid())
enable_turbo();
@@ -95,9 +96,8 @@ static void pre_mp_init(void)
x86_mtrr_check();
/*
* Configure the BUNIT to allow dirty cache line evictions in non-SMM
* mode for the lines that were dirtied while in SMM mode. Otherwise
* the writes would be silently dropped.
* Configure the BUNIT to allow dirty cache line evictions in non-SMM mode for lines
* that were dirtied while in SMM mode. Otherwise the writes would be silently dropped.
*/
bsmrwac = iosf_bunit_read(BUNIT_SMRWAC) | SAI_IA_UNTRUSTED;
iosf_bunit_write(BUNIT_SMRWAC, bsmrwac);