From 26e384bf34d0a934e9acc4a88cd9482d78826b8b Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Wed, 8 Dec 2021 10:26:20 -0700 Subject: [PATCH] soc/intel/alderlake: Fix value of SA_DEVFN_CPU_PCIE1_0 The macro was defined using PCH_DEV_SLOT_CPU_1, which doesn't exist, so replace it with the correct value of SA_DEV_SLOT_CPU_1. Change-Id: If6d294d681907c51ac5678c9251364d4d6df4329 Signed-off-by: Tim Wawrzynczak Reviewed-on: https://review.coreboot.org/c/coreboot/+/59981 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik --- src/soc/intel/alderlake/include/soc/pci_devs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/intel/alderlake/include/soc/pci_devs.h b/src/soc/intel/alderlake/include/soc/pci_devs.h index 1729160634..956a021b68 100644 --- a/src/soc/intel/alderlake/include/soc/pci_devs.h +++ b/src/soc/intel/alderlake/include/soc/pci_devs.h @@ -26,7 +26,7 @@ #endif #define SA_DEV_SLOT_CPU_1 0x01 -#define SA_DEVFN_CPU_PCIE1_0 PCI_DEVFN(PCH_DEV_SLOT_CPU_1, 0) +#define SA_DEVFN_CPU_PCIE1_0 PCI_DEVFN(SA_DEV_SLOT_CPU_1, 0) #define SA_DEV_SLOT_IGD 0x02 #define SA_DEVFN_IGD PCI_DEVFN(SA_DEV_SLOT_IGD, 0)