treewide: stop calling custom TPM log "TCPA"

TCPA usually refers to log described by TPM 1.2 specification.

Change-Id: I896bd94f18b34d6c4b280f58b011d704df3d4022
Ticket: https://ticket.coreboot.org/issues/423
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69444
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

src/soc/cavium/cn81xx/memlayout.ld

@@ -23,7 +23,7 @@ SECTIONS
 	BOOTBLOCK(BOOTROM_OFFSET + 0x20000, 56K)
 	CBFS_MCACHE(BOOTROM_OFFSET + 0x2e000, 8K)
 	VBOOT2_WORK(BOOTROM_OFFSET + 0x30000, 12K)
-	TPM_TCPA_LOG(BOOTROM_OFFSET + 0x33000, 2K)
+	TPM_LOG(BOOTROM_OFFSET + 0x33000, 2K)
 	VERSTAGE(BOOTROM_OFFSET + 0x33800, 50K)
 	ROMSTAGE(BOOTROM_OFFSET + 0x40000, 256K)
 

src/soc/mediatek/mt8173/memlayout.ld

@@ -26,7 +26,7 @@ SECTIONS
 
 	SRAM_START(0x00100000)
 	VBOOT2_WORK(0x00100000, 12K)
-	TPM_TCPA_LOG(0x00103000, 2K)
+	TPM_LOG(0x00103000, 2K)
 	FMAP_CACHE(0x00103800, 2K)
 	PRERAM_CBMEM_CONSOLE(0x00104000, 12K)
 	WATCHDOG_TOMBSTONE(0x00107000, 4)

src/soc/mediatek/mt8183/memlayout.ld

@@ -23,7 +23,7 @@ SECTIONS
 {
 	SRAM_START(0x00100000)
 	VBOOT2_WORK(0x00100000, 12K)
-	TPM_TCPA_LOG(0x00103000, 2K)
+	TPM_LOG(0x00103000, 2K)
 	FMAP_CACHE(0x00103800, 2K)
 	WATCHDOG_TOMBSTONE(0x00104000, 4)
 	PRERAM_CBMEM_CONSOLE(0x00104004, 63K - 4)

src/soc/mediatek/mt8186/include/soc/memlayout.ld

@@ -31,7 +31,7 @@ SECTIONS
 	/* EMPTY(0x0010a804, 1K - 4) */
 	/* Regions that can also be moved to SRAM_L2C. */
 	TIMESTAMP(0x0010ac00, 1K)
-	TPM_TCPA_LOG(0x0010b000, 2K)
+	TPM_LOG(0x0010b000, 2K)
 	FMAP_CACHE(0x0010b800, 2K)
 	CBFS_MCACHE(0x0010c000, 16K)
 	SRAM_END(0x00110000)

src/soc/mediatek/mt8188/include/soc/memlayout.ld

@@ -34,7 +34,7 @@ SECTIONS
 	CBFS_MCACHE(0x00120000, 16k)
 	VBOOT2_WORK(0x00124000, 12K)
 	FMAP_CACHE(0x00127000, 2k)
-	TPM_TCPA_LOG(0x00127800, 2k)
+	TPM_LOG(0x00127800, 2k)
 	TIMESTAMP(0x00128000, 1k)
 	/* End of regions that can also be moved to SRAM_L2C. */
 	/* EMPTY(0x00128400, 31K) */

src/soc/mediatek/mt8192/include/soc/memlayout.ld

@@ -23,7 +23,7 @@ SECTIONS
 {
 	SRAM_START(0x00100000)
 	VBOOT2_WORK(0x00100000, 12K)
-	TPM_TCPA_LOG(0x00103000, 2K)
+	TPM_LOG(0x00103000, 2K)
 	FMAP_CACHE(0x00103800, 2K)
 	WATCHDOG_TOMBSTONE(0x00104000, 4)
 	CBFS_MCACHE(0x00107c00, 8K)

src/soc/mediatek/mt8195/include/soc/memlayout.ld

@@ -26,7 +26,7 @@ SECTIONS
 {
 	SRAM_START(0x00100000)
 	VBOOT2_WORK(0x00100000, 12K)
-	TPM_TCPA_LOG(0x00103000, 2K)
+	TPM_LOG(0x00103000, 2K)
 	FMAP_CACHE(0x00103800, 2K)
 	WATCHDOG_TOMBSTONE(0x00104000, 4)
 	EARLY_INIT(0x00104010, 128)

src/soc/nvidia/tegra124/memlayout.ld

@@ -19,7 +19,7 @@ SECTIONS
 	CBFS_MCACHE(0x40006000, 8K)
 	PRERAM_CBFS_CACHE(0x40008000, 6K)
 	VBOOT2_WORK(0x40009800, 12K)
-	TPM_TCPA_LOG(0x4000D800, 2K)
+	TPM_LOG(0x4000D800, 2K)
 	STACK(0x4000E000, 8K)
 	BOOTBLOCK(0x40010000, 32K)
 	VERSTAGE(0x40018000, 70K)

src/soc/nvidia/tegra210/memlayout.ld

@@ -19,7 +19,7 @@ SECTIONS
 	PRERAM_CBFS_CACHE(0x40001000, 20K)
 	CBFS_MCACHE(0x40006000, 8K)
 	VBOOT2_WORK(0x40008000, 12K)
-	TPM_TCPA_LOG(0x4000B000, 2K)
+	TPM_LOG(0x4000B000, 2K)
 #if ENV_ARM64
 	STACK(0x4000B800, 3K)
 #else	/* AVP gets a separate stack to avoid any chance of handoff races. */

src/soc/qualcomm/sc7180/memlayout.ld

@@ -32,7 +32,7 @@ SECTIONS
 	REGION(pbl_timestamps, 0x14800000, 83K, 4K)
 	WATCHDOG_TOMBSTONE(0x14814FFC, 4)
 	BOOTBLOCK(0x14815000, 48K)
-	TPM_TCPA_LOG(0x14821000, 2K)
+	TPM_LOG(0x14821000, 2K)
 	PRERAM_CBFS_CACHE(0x14821800, 60K)
 	PRERAM_CBMEM_CONSOLE(0x14830800, 32K)
 	TIMESTAMP(0x14838800, 1K)

src/soc/samsung/exynos5250/memlayout.ld

@@ -21,7 +21,7 @@ SECTIONS
 	PRERAM_CBFS_CACHE(0x205C000, 68K)
 	CBFS_MCACHE(0x206D000, 8K)
 	FMAP_CACHE(0x206F000, 2K)
-	TPM_TCPA_LOG(0x206F800, 2K)
+	TPM_LOG(0x206F800, 2K)
 	VBOOT2_WORK(0x2070000, 12K)
 	STACK(0x2074000, 16K)
 	SRAM_END(0x2078000)