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SMBIOS: Remove duplicated smbios_memory_type enum

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Change-Id: I49554d13f1b6371b85a58cc1263608ad9e99130e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29638
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
This commit is contained in:
Elyes HAOUAS
2018-11-14 17:51:00 +01:00
committed by Patrick Georgi
parent 0acb28a9c0
commit 28114ae71b
4 changed files with 13 additions and 37 deletions
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2
src/include/memory_info.h
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@ -36,7 +36,7 @@ struct dimm_info {
/* /*
* SMBIOS (not SPD) device type. * SMBIOS (not SPD) device type.
* *
* See the smbios.h smbios_memory_device_type enum. * See the smbios.h smbios_memory_type enum.
*/ */
uint16_t ddr_type; uint16_t ddr_type;
uint16_t ddr_frequency; uint16_t ddr_frequency;

36
src/include/smbios.h
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@ -96,36 +96,6 @@ typedef enum {
MEMORY_BUS_WIDTH_MAX = 7, MEMORY_BUS_WIDTH_MAX = 7,
} smbios_memory_bus_width; } smbios_memory_bus_width;
typedef enum {
MEMORY_DEVICE_OTHER = 0x01,
MEMORY_DEVICE_UNKNOWN = 0x02,
MEMORY_DEVICE_DRAM = 0x03,
MEMORY_DEVICE_EDRAM = 0x04,
MEMORY_DEVICE_VRAM = 0x05,
MEMORY_DEVICE_SRAM = 0x06,
MEMORY_DEVICE_RAM = 0x07,
MEMORY_DEVICE_ROM = 0x08,
MEMORY_DEVICE_FLASH = 0x09,
MEMORY_DEVICE_EEPROM = 0x0A,
MEMORY_DEVICE_FEPROM = 0x0B,
MEMORY_DEVICE_EPROM = 0x0C,
MEMORY_DEVICE_CDRAM = 0x0D,
MEMORY_DEVICE_3DRAM = 0x0E,
MEMORY_DEVICE_SDRAM = 0x0F,
MEMORY_DEVICE_SGRAM = 0x10,
MEMORY_DEVICE_RDRAM = 0x11,
MEMORY_DEVICE_DDR = 0x12,
MEMORY_DEVICE_DDR2 = 0x13,
MEMORY_DEVICE_DDR2_FB_DIMM = 0x14,
MEMORY_DEVICE_DDR3 = 0x18,
MEMORY_DEVICE_DBD2 = 0x19,
MEMORY_DEVICE_DDR4 = 0x1A,
MEMORY_DEVICE_LPDDR = 0x1B,
MEMORY_DEVICE_LPDDR2 = 0x1C,
MEMORY_DEVICE_LPDDR3 = 0x1D,
MEMORY_DEVICE_LPDDR4 = 0x1E,
} smbios_memory_device_type;
typedef enum { typedef enum {
MEMORY_FORMFACTOR_OTHER = 0x01, MEMORY_FORMFACTOR_OTHER = 0x01,
MEMORY_FORMFACTOR_UNKNOWN = 0x02, MEMORY_FORMFACTOR_UNKNOWN = 0x02,
@ -167,6 +137,12 @@ typedef enum {
MEMORY_TYPE_DDR2_FBDIMM = 0x14, MEMORY_TYPE_DDR2_FBDIMM = 0x14,
MEMORY_TYPE_DDR3 = 0x18, MEMORY_TYPE_DDR3 = 0x18,
MEMORY_TYPE_FBD2 = 0x19, MEMORY_TYPE_FBD2 = 0x19,
MEMORY_TYPE_DDR4 = 0x1a,
MEMORY_TYPE_LPDDR = 0x1b,
MEMORY_TYPE_LPDDR2 = 0x1c,
MEMORY_TYPE_LPDDR3 = 0x1d,
MEMORY_TYPE_LPDDR4 = 0x1e,
MEMORY_TYPE_LOGICAL_NON_VOLATILE_DEVICE = 0x1f,
} smbios_memory_type; } smbios_memory_type;
typedef enum { typedef enum {

4
src/mainboard/google/cyan/spd/spd.c
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@ -138,9 +138,9 @@ static void set_dimm_info(uint8_t *spd, struct dimm_info *dimm)
/* Parse the SPD data to determine the DIMM information */ /* Parse the SPD data to determine the DIMM information */
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) { if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) {
dimm->ddr_type = MEMORY_DEVICE_DDR3; dimm->ddr_type = MEMORY_TYPE_DDR3;
} else { } else {
dimm->ddr_type = MEMORY_DEVICE_LPDDR3; dimm->ddr_type = MEMORY_TYPE_LPDDR3;
} }
dimm->dimm_size = capmb / 8 * busw / devw * ranks; /* MiB */ dimm->dimm_size = capmb / 8 * busw / devw * ranks; /* MiB */
dimm->mod_type = spd[3] & 0xf; dimm->mod_type = spd[3] & 0xf;

8
src/soc/intel/skylake/romstage/romstage_fsp20.c
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@ -103,16 +103,16 @@ static void save_dimm_info(void)
switch(memory_info_hob->MemoryType) { switch(memory_info_hob->MemoryType) {
case MRC_DDR_TYPE_DDR4: case MRC_DDR_TYPE_DDR4:
ddr_type = MEMORY_DEVICE_DDR4; ddr_type = MEMORY_TYPE_DDR4;
break; break;
case MRC_DDR_TYPE_DDR3: case MRC_DDR_TYPE_DDR3:
ddr_type = MEMORY_DEVICE_DDR3; ddr_type = MEMORY_TYPE_DDR3;
break; break;
case MRC_DDR_TYPE_LPDDR3: case MRC_DDR_TYPE_LPDDR3:
ddr_type = MEMORY_DEVICE_LPDDR3; ddr_type = MEMORY_TYPE_LPDDR3;
break; break;
default: default:
ddr_type = MEMORY_DEVICE_UNKNOWN; ddr_type = MEMORY_TYPE_UNKNOWN;
break; break;
} }