src/soc/intel: Drop unneeded empty lines

Change-Id: Id93aab5630e928ee4d7e957801e15a4cc8739fae
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44594
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/tigerlake/include/soc/espi.h

@@ -9,7 +9,6 @@
 #ifndef _SOC_TIGERLAKE_ESPI_H_
 #define _SOC_TIGERLAKE_ESPI_H_
 
-
 /* PCI Configuration Space (D31:F0): ESPI */
 #define SCI_IRQ_SEL		(7 << 0)
 #define SCIS_IRQ9		0

src/soc/intel/tigerlake/include/soc/gpio.h

@@ -6,7 +6,6 @@
 #include <soc/gpio_defs.h>
 #include <intelblocks/gpio.h>
 
-
 #define CROS_GPIO_DEVICE_NAME	"INT34C5:00"
 
 #endif

src/soc/intel/tigerlake/include/soc/gpio_defs.h

@@ -109,7 +109,6 @@
 #define GPP_R6_IRQ				0x5E
 #define GPP_R7_IRQ				0x5F
 
-
 /* Group D */
 #define GPD0_IRQ				0x60
 #define GPD1_IRQ				0x61
@@ -182,7 +181,6 @@
 #define GPP_D18_IRQ				0x3E
 #define GPP_D19_IRQ				0x3F
 
-
 /* Group U */
 #define GPP_U0_IRQ				0x40
 #define GPP_U1IRQ				0x41
@@ -205,7 +203,6 @@
 #define GPP_U18_IRQ				0x52
 #define GPP_U19_IRQ				0x53
 
-
 #define GPP_VGPIO4_IRQ				0x54
 
 /* Group F */
@@ -260,8 +257,6 @@
 #define GPP_C22_IRQ				0x24
 #define GPP_C23_IRQ				0x25
 
-
-
 /* Group E */
 #define GPP_E0_IRQ				0x26
 #define GPP_E1_IRQ				0x27

src/soc/intel/tigerlake/include/soc/pch.h

@@ -3,7 +3,6 @@
 #ifndef _SOC_TIGERLAKE_PCH_H_
 #define _SOC_TIGERLAKE_PCH_H_
 
-
 #define PCIE_CLK_NOTUSED		0xFF
 #define PCIE_CLK_LAN			0x70
 #define PCIE_CLK_FREE			0x80

src/soc/intel/tigerlake/include/soc/usb.h

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-
 #ifndef _SOC_USB_H_
 #define _SOC_USB_H_
 

src/soc/intel/tigerlake/pmutil.c

@@ -11,7 +11,6 @@
  * Chapter number: 4
  */
 
-
 #define __SIMPLE_DEVICE__
 
 #include <device/mmio.h>
@@ -163,7 +162,6 @@ uintptr_t soc_read_pmc_base(void)
 	return (uintptr_t)pmc_mmio_regs();
 }
 
-
 uint32_t *soc_pmc_etr_addr(void)
 {
 	return (uint32_t *)(soc_read_pmc_base() + ETR);