sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

acpi: Replace EC_ENABLE_AMD_DPTC_SUPPORT with Kconfig value

Browse Source 
Compile-time support of DPTC is controlled by
EC_ENABLE_AMD_DPTC_SUPPORT in each variant's ec.h file. This CL removes
EC_ENABLE_AMD_DPTC_SUPPORT and replaces it with the Kconfig value
SOC_AMD_COMMON_BLOCK_ACPI_DPTC.

Each variant's run-time support of DPTC continues to be controlled by
the variant's overridetree.cb "dptc_enable" value.

BRANCH=none
BUG=b:217911928
TEST=Build zork
TEST=Boot skyrim

Signed-off-by: Tim Van Patten <timvp@google.com>
Change-Id: Ic101e74bab88e20be0cb5aaf66e4349baa1432e3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67180
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Tim Van Patten
2022-08-29 11:36:35 -06:00
committed by Martin Roth
parent 9e86b71e79
commit 2873fd2770
4 changed files with 11 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/ec/google/chromeec/acpi/ec.asl
View File

@@ -17,7 +17,7 @@
External (\_SB.DPTF.TCHG, DeviceObj)
#endif
/* Enable DPTC interface with AMD ALIB */
#ifdef EC_ENABLE_AMD_DPTC_SUPPORT
#if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC)
External(\_SB.DPTC, MethodObj)
#endif
@@ -177,7 +177,7 @@ Device (EC0)
// Initialize LID switch state
Store (LIDS, \LIDS)
#ifdef EC_ENABLE_AMD_DPTC_SUPPORT
#if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC)
/*
* Per the device mode (clamshell or tablet) to initialize
* the thermal setting on OS startup.
@@ -435,7 +435,7 @@ Device (EC0)
#ifdef EC_ENABLE_TBMC_DEVICE
Notify (TBMC, 0x80)
#endif
#ifdef EC_ENABLE_AMD_DPTC_SUPPORT
#if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC)
If (CondRefOf (\_SB.DPTC)) {
\_SB.DPTC()
}