Add CONFIG_VGA_ROM_RUN to dbm690t and pistachio, otherwise the
VGA ROM can not run. After make, run > ./cbfs/cbfstool ./coreboot.rom add ../vga_bios.rom pci1002,791f.rom optionrom to make the final image with vga bios. The macro vga_rom_address is out-of-date when CBFS starts play its role. it also should be eliminated from rs690/chip.h as below. But it will cause building error on other board, which I cant make test on. ## Index: src/southbridge/amd/rs690/chip.h ## =================================================================== ## --- src/southbridge/amd/rs690/chip.h (revision 4782) ## +++ src/southbridge/amd/rs690/chip.h (working copy) ## @@ -23,7 +23,6 @@ ## /* Member variables are defined in Config.lb. */ ## struct southbridge_amd_rs690_config ## { ## - u32 vga_rom_address; /* The location that the VGA rom has been appened. */ ## u8 gpp_configuration; /* The configuration of General Purpose Port, A/B/C/D/E. */ ## u8 port_enable; /* Which port is enabled? GFX(2,3), GPP(4,5,6,7) */ ## u8 gfx_dev2_dev3; /* for GFX Core initialization REFCLK_SEL */ ## Don't apply above patch about rs690/chip.h before every board has been fixed. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@@ -77,13 +77,9 @@ static void internal_gfx_pci_dev_init(struct device *dev)
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(struct southbridge_amd_rs690_config *)dev->chip_info;
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deviceid = pci_read_config16(dev, PCI_DEVICE_ID);
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vendorid = pci_read_config16(dev, PCI_VENDOR_ID);
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printk_info("internal_gfx_pci_dev_init device=%x, vendor=%x, vga_rom_address=0x%x.\n",
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deviceid, vendorid, cfg->vga_rom_address);
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printk_info("internal_gfx_pci_dev_init device=%x, vendor=%x.\n",
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deviceid, vendorid);
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#if 0 /* I think these should be done in Config.lb. Please check it. */
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dev->on_mainboard = 1;
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dev->rom_address = cfg->vga_rom_address; /* 0xfff00000; */
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#endif
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pci_dev_init(dev);
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/* clk ind */
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