libpayload/Makefile: Improve object files list creation

This patch ports some parts of main coreboot Makefile to the libpayload
Makefile in order to improve object files creation.

Moreover, the coreboot source files are now accessible an will be
correctly compiled under libpayload build directory.

Change-Id: If1280c0a3f7e99aad2ecf8a0379a98af31ccefc3
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59843
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
This commit is contained in:
Jakub Czapiga
2021-12-02 15:29:18 +00:00
committed by Patrick Georgi
parent 0b25e00ab1
commit 289e2f6a64

View File

@ -29,6 +29,10 @@
## SUCH DAMAGE. ## SUCH DAMAGE.
## ##
ifneq ($(words $(CURDIR)),1)
$(error ERROR: Path to the main directory cannot contain spaces)
endif
ifeq ($(INNER_SCANBUILD),y) ifeq ($(INNER_SCANBUILD),y)
CC_real:=$(CC) CC_real:=$(CC)
endif endif
@ -40,6 +44,7 @@ export srck := $(abspath $(top)/../../util/kconfig)
export obj ?= build export obj ?= build
export objutil ?= $(obj)/util export objutil ?= $(obj)/util
export objk := $(objutil)/lp_kconfig export objk := $(objutil)/lp_kconfig
export absobj := $(abspath $(obj))
export KCONFIG_AUTOHEADER := $(obj)/config.h export KCONFIG_AUTOHEADER := $(obj)/config.h
export KCONFIG_AUTOCONFIG := $(obj)/auto.conf export KCONFIG_AUTOCONFIG := $(obj)/auto.conf
@ -290,9 +295,11 @@ includemakefiles= \
$(foreach item,$($(special)-y), $(call $(special)-handler,$(dir $(1)),$(item)))) \ $(foreach item,$($(special)-y), $(call $(special)-handler,$(dir $(1)),$(item)))) \
$(foreach class,$(classes), \ $(foreach class,$(classes), \
$(eval $(class)-srcs+= \ $(eval $(class)-srcs+= \
$$(subst $(absobj)/,$(obj)/, \
$$(subst $(top)/,, \ $$(subst $(top)/,, \
$$(abspath $$(addprefix $(dir $(1)),$$($(class)-y)))))) \ $$(abspath $$(subst $(dir $(1))/,/,$$(addprefix $(dir $(1)),$$($(class)-y)))))))) \
$(eval subdirs+=$$(subst $(CURDIR)/,,$$(abspath $$(addprefix $(dir $(1)),$$(subdirs-y))))) $(eval subdirs+=$$(subst $(CURDIR)/,,$$(wildcard $$(abspath $$(addprefix $(dir $(1)),$$(subdirs-y))))))
# For each path in $(subdirs) call includemakefiles # For each path in $(subdirs) call includemakefiles
# Repeat until subdirs is empty # Repeat until subdirs is empty
@ -311,8 +318,15 @@ else
include $(TOPLEVEL)/tests/Makefile.inc include $(TOPLEVEL)/tests/Makefile.inc
endif endif
src-to-obj=$(addsuffix .$(1).o, $(basename $(addprefix $(obj)/, $($(1)-srcs)))) # Converts one or more source file paths to the corresponding build/ paths.
$(foreach class,$(classes),$(eval $(class)-objs:=$(call src-to-obj,$(class)))) # $1 lib name
# $2 file path (list)
src-to-obj=\
$(addsuffix .$(1).o,\
$(basename \
$(addprefix $(obj)/,\
$(subst $(coreboottop)/,coreboot/,$(2)))))
$(foreach class,$(classes),$(eval $(class)-objs:=$(call src-to-obj,$(class),$($(class)-srcs))))
allsrcs:=$(foreach var, $(addsuffix -srcs,$(classes)), $($(var))) allsrcs:=$(foreach var, $(addsuffix -srcs,$(classes)), $($(var)))
allobjs:=$(foreach var, $(addsuffix -objs,$(classes)), $($(var))) allobjs:=$(foreach var, $(addsuffix -objs,$(classes)), $($(var)))
@ -326,7 +340,7 @@ define create_cc_template
# $4 additional dependencies # $4 additional dependencies
ifn$(EMPTY)def $(1)-objs_$(2)_template ifn$(EMPTY)def $(1)-objs_$(2)_template
de$(EMPTY)fine $(1)-objs_$(2)_template de$(EMPTY)fine $(1)-objs_$(2)_template
$(obj)/$$(1).$(1).o: $$(1).$(2) $(obj)/libpayload-config.h $(4) $$(call src-to-obj,$(1), $$(1).$(2)): $$(1).$(2) $(obj)/libpayload-config.h $(4)
@printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n" @printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n"
$(CC) $(3) -MMD $$$$(CFLAGS) $(EXTRA_CFLAGS) -c -o $$$$@ $$$$< $(CC) $(3) -MMD $$$$(CFLAGS) $(EXTRA_CFLAGS) -c -o $$$$@ $$$$<
en$(EMPTY)def en$(EMPTY)def