src/*: Specify type of DIMM_SPD_SIZE once

Specify the type of the `DIMM_SPD_SIZE` Kconfig symbol once.

Change-Id: I619833dbce6d2dbe414ed9b37f43196b4b52730e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57257
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Angel Pons 2021-08-30 09:56:25 +02:00 committed by Felix Held
parent 349f13071d
commit 28a16d960c
33 changed files with 0 additions and 33 deletions

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@ -35,7 +35,6 @@ config DIMM_MAX
default 2 default 2
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config FMDFILE config FMDFILE

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@ -32,7 +32,6 @@ config PRERAM_CBMEM_CONSOLE_SIZE
default 0xd00 default 0xd00
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 #DDR4 default 512 #DDR4
endif endif

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@ -61,7 +61,6 @@ config BAP_E20_DDR3_1066
endchoice endchoice
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 128 default 128
endif # BOARD_ODE_E20XX endif # BOARD_ODE_E20XX

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@ -57,7 +57,6 @@ config DIMM_MAX
default 2 default 2
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config VGA_BIOS_ID config VGA_BIOS_ID

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@ -54,7 +54,6 @@ config PRERAM_CBMEM_CONSOLE_SIZE
default 0xd00 default 0xd00
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 #DDR4 default 512 #DDR4
config UART_FOR_CONSOLE config UART_FOR_CONSOLE

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@ -46,7 +46,6 @@ config SB800_AHCI_ROM
default n default n
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 128 default 128
endif # BOARD_GIZMOSPHERE_GIZMO endif # BOARD_GIZMOSPHERE_GIZMO

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@ -44,7 +44,6 @@ config HUDSON_LEGACY_FREE
default y default y
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 128 default 128
endif # BOARD_GIZMOSPHERE_GIZMO2 endif # BOARD_GIZMOSPHERE_GIZMO2

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@ -105,7 +105,6 @@ config VARIANT_DIR
default "anahera" if BOARD_GOOGLE_ANAHERA default "anahera" if BOARD_GOOGLE_ANAHERA
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config UART_FOR_CONSOLE config UART_FOR_CONSOLE

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@ -73,7 +73,6 @@ config DEVICETREE
default "variants/baseboard/devicetree.cb" default "variants/baseboard/devicetree.cb"
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config FMDFILE config FMDFILE

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@ -28,7 +28,6 @@ config CHROMEOS
select GBB_FLAG_FORCE_DEV_BOOT_ALTFW select GBB_FLAG_FORCE_DEV_BOOT_ALTFW
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config DEVICETREE config DEVICETREE

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@ -61,7 +61,6 @@ config DIMM_MAX
default 2 default 2
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config TPM_TIS_ACPI_INTERRUPT config TPM_TIS_ACPI_INTERRUPT

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@ -58,7 +58,6 @@ config CHROMEOS_WIFI_SAR
select USE_SAR select USE_SAR
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config DEVICETREE config DEVICETREE

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@ -27,7 +27,6 @@ config DIMM_MAX
default 2 default 2
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config UART_FOR_CONSOLE config UART_FOR_CONSOLE

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@ -68,7 +68,6 @@ config OVERRIDE_DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
choice choice

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@ -78,7 +78,6 @@ config INCLUDE_SND_MAX98373_NHLT
select NHLT_MAX98373 select NHLT_MAX98373
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config VBOOT config VBOOT

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@ -32,7 +32,6 @@ config DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config VBOOT config VBOOT

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@ -40,7 +40,6 @@ config DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config VBOOT config VBOOT

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@ -42,7 +42,6 @@ config DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config CHROMEOS config CHROMEOS

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@ -69,7 +69,6 @@ config PRERAM_CBMEM_CONSOLE_SIZE
default 0xd00 default 0xd00
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 if BOARD_INTEL_KBLRVP8 || BOARD_INTEL_KBLRVP11 #DDR4 default 512 if BOARD_INTEL_KBLRVP8 || BOARD_INTEL_KBLRVP11 #DDR4
config UART_FOR_CONSOLE config UART_FOR_CONSOLE

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@ -40,7 +40,6 @@ config VBOOT
select VBOOT_EARLY_EC_SYNC select VBOOT_EARLY_EC_SYNC
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config DEVICETREE config DEVICETREE

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@ -72,7 +72,6 @@ config DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
choice choice

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@ -54,7 +54,6 @@ config DIMM_MAX
default 2 default 2
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
endif endif

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@ -35,7 +35,6 @@ config DIMM_MAX
default 2 default 2
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config CBFS_SIZE config CBFS_SIZE

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@ -90,7 +90,6 @@ config UART_D_RS485
bool "UART D drives RTS# in RS485 mode" if APU1_PINMUX_UART_D bool "UART D drives RTS# in RS485 mode" if APU1_PINMUX_UART_D
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 128 default 128
endif # BOARD_PCENGINES_APU1 endif # BOARD_PCENGINES_APU1

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@ -94,7 +94,6 @@ config APU2_PINMUX_UART_D
endchoice endchoice
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 128 default 128
config AGESA_USE_1_0_0_4_HEADER config AGESA_USE_1_0_0_4_HEADER

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@ -36,7 +36,6 @@ config DIMM_MAX
default 1 default 1
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 256 default 256
config MAX_CPUS config MAX_CPUS

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@ -30,7 +30,6 @@ config DIMM_MAX
default 2 default 2
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config MAX_CPUS config MAX_CPUS

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@ -45,7 +45,6 @@ config DIMM_MAX
default 2 default 2
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config VGA_BIOS_ID config VGA_BIOS_ID

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@ -58,7 +58,6 @@ config DIMM_MAX
default 1 default 1
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config CBFS_SIZE config CBFS_SIZE

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@ -30,7 +30,6 @@ config DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config UART_FOR_CONSOLE config UART_FOR_CONSOLE

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@ -79,7 +79,6 @@ config POST_DEVICE
default n default n
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
config SUPERMICRO_BOARDID config SUPERMICRO_BOARDID

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@ -361,7 +361,6 @@ comment "AMD Firmware Directory Table set to location for 16MB ROM"
depends on AMD_FWM_POSITION_INDEX = 5 depends on AMD_FWM_POSITION_INDEX = 5
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 # DDR4 default 512 # DDR4
config RO_REGION_ONLY config RO_REGION_ONLY

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@ -110,7 +110,6 @@ config DIMM_MAX
# DDR4 # DDR4
config DIMM_SPD_SIZE config DIMM_SPD_SIZE
int
default 512 default 512
if INTEL_TXT if INTEL_TXT