mainboard/google/puff: Configure HDA registers
Enable PCH HDA and configure dmic+ssp registers. BRANCH=none BUG=b:146519004 TEST=./util/abuild/abuild -p none -t google/hatch -x -a Change-Id: If9495261201ca256cdb35352338c0b3a82a50196 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37859 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Daniel Kurtz <djkurtz@google.com>
This commit is contained in:
parent
e8b7ff1ab5
commit
295fdbef39
@ -68,6 +68,10 @@ chip soc/intel/cannonlake
|
|||||||
# [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39.
|
# [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39.
|
||||||
register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515"
|
register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515"
|
||||||
|
|
||||||
|
# Intel HDA - disable I2S Audio SSP1 and DMIC0 as puff variant does not have them.
|
||||||
|
register "PchHdaAudioLinkSsp1" = "0"
|
||||||
|
register "PchHdaAudioLinkDmic0" = "0"
|
||||||
|
|
||||||
# Intel Common SoC Config
|
# Intel Common SoC Config
|
||||||
#+-------------------+---------------------------+
|
#+-------------------+---------------------------+
|
||||||
#| Field | Value |
|
#| Field | Value |
|
||||||
|
Loading…
x
Reference in New Issue
Block a user