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soc/intel/apl: Add panel power and backlight configuration

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Change-Id: Id8892ac7aafce1006831e2d9f2806919f5950756
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40694
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Nico Huber
2020-01-06 17:42:45 +01:00
committed by Nico Huber
parent 2d28c4cff4
commit 2a16331f8c
4 changed files with 126 additions and 0 deletions
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27
src/drivers/intel/gma/i915_reg.h
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@@ -1673,6 +1673,33 @@
#define BLM_PCH_POLARITY (1 << 29)
#define BLC_PWM_PCH_CTL2 0xc8254
#define UTIL_PIN_CTL 0x48400
#define UTIL_PIN_ENABLE (1 << 31)
#define UTIL_PIN_PIPE(x) ((x) << 29)
#define UTIL_PIN_PIPE_MASK (3 << 29)
#define UTIL_PIN_MODE_PWM (1 << 24)
#define UTIL_PIN_MODE_MASK (0xf << 24)
#define UTIL_PIN_POLARITY (1 << 22)
/* BXT backlight register definition. */
#define _BXT_BLC_PWM_CTL1 0xC8250
#define BXT_BLC_PWM_ENABLE (1 << 31)
#define BXT_BLC_PWM_POLARITY (1 << 29)
#define _BXT_BLC_PWM_FREQ1 0xC8254
#define _BXT_BLC_PWM_DUTY1 0xC8258
#define _BXT_BLC_PWM_CTL2 0xC8350
#define _BXT_BLC_PWM_FREQ2 0xC8354
#define _BXT_BLC_PWM_DUTY2 0xC8358
#define BXT_BLC_PWM_CTL(controller) _PIPE(controller, \
_BXT_BLC_PWM_CTL1, _BXT_BLC_PWM_CTL2)
#define BXT_BLC_PWM_FREQ(controller) _PIPE(controller, \
_BXT_BLC_PWM_FREQ1, _BXT_BLC_PWM_FREQ2)
#define BXT_BLC_PWM_DUTY(controller) _PIPE(controller, \
_BXT_BLC_PWM_DUTY1, _BXT_BLC_PWM_DUTY2)
/* TV port control */
#define TV_CTL 0x68000
/** Enables the TV encoder */