soc/intel/broadwell: Use common SB RTC code

Change-Id: Iedb9a8962ac1b4107e9192b0be610fb92d2cfdc6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33202
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Arthur Heymans
2019-06-04 14:12:01 +02:00
committed by Nico Huber
parent 1d4bdda47f
commit 2abbe46765
4 changed files with 3 additions and 35 deletions

View File

@@ -42,6 +42,7 @@
#include <soc/rcba.h>
#include <soc/intel/broadwell/chip.h>
#include <arch/acpigen.h>
#include <southbridge/intel/common/rtc.h>
static void pch_enable_ioapic(struct device *dev)
{
@@ -190,11 +191,6 @@ static void pch_power_options(struct device *dev)
enable_alt_smi(config->alt_gp_smi_en);
}
static void pch_rtc_init(struct device *dev)
{
cmos_init(rtc_failure());
}
static const struct reg_script pch_misc_init_script[] = {
/* Setup SLP signal assertion, SLP_S4=4s, SLP_S3=50ms */
REG_PCI_RMW16(GEN_PMCON_3, ~((3 << 4)|(1 << 10)),
@@ -439,7 +435,7 @@ static void lpc_init(struct device *dev)
{
/* Legacy initialization */
isa_dma_init();
pch_rtc_init(dev);
sb_rtc_init();
reg_script_run_on_dev(dev, pch_misc_init_script);
/* Interrupt configuration */