libpayload/pci: Add support for bus mapping
Move the common APIs to pci_ops.c and IO based operations to pci_io_ops.c, and add pci_map_bus_ops.c to support bus mapping. TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006 BUG=b:178565024 BRANCH=cherry Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Change-Id: Ie74801bd4f3de51cbb574e86cd9bb09931152554 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56789 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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@ -31,6 +31,8 @@
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#define _PCI_H
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#include <arch/types.h>
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#include <stdint.h>
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typedef u32 pcidev_t;
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/* Device config space registers. */
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@ -100,13 +102,15 @@ typedef u32 pcidev_t;
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#define PCI_SLOT(_d) ((_d >> 11) & 0x1f)
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#define PCI_FUNC(_d) ((_d >> 8) & 0x7)
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u8 pci_read_config8(u32 device, u16 reg);
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u16 pci_read_config16(u32 device, u16 reg);
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u32 pci_read_config32(u32 device, u16 reg);
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uintptr_t pci_map_bus(pcidev_t dev);
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void pci_write_config8(u32 device, u16 reg, u8 val);
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void pci_write_config16(u32 device, u16 reg, u16 val);
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void pci_write_config32(u32 device, u16 reg, u32 val);
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u8 pci_read_config8(pcidev_t dev, u16 reg);
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u16 pci_read_config16(pcidev_t dev, u16 reg);
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u32 pci_read_config32(pcidev_t dev, u16 reg);
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void pci_write_config8(pcidev_t dev, u16 reg, u8 val);
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void pci_write_config16(pcidev_t dev, u16 reg, u16 val);
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void pci_write_config32(pcidev_t dev, u16 reg, u32 val);
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int pci_find_device(u16 vid, u16 did, pcidev_t *dev);
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u32 pci_read_resource(pcidev_t dev, int bar);
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