sb/intel/bd82x6x: Make the pch_enable_lpc hook optional

This also changes the name to mainboard_pch_lpc_setup to better
reflect that it is an optional mainboard hook.

This adds an empty weakly linked default. The rationale behind this
change is that without an implementation of the hook some features
might not work but that the result is likely still able to boot, so it
can be made optional.

Change-Id: Ie8e6056b4c4aed3739d2d12b4224de36fe217189
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36782
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

src/mainboard/asus/h61m-cs/romstage.c

@@ -27,10 +27,6 @@
 #define SIO_DEV		PNP_DEV(SIO_PORT, 0)
 #define ACPI_DEV	PNP_DEV(SIO_PORT, NCT6779D_ACPI)
 
-void pch_enable_lpc(void)
-{
-}
-
 const struct southbridge_usb_port mainboard_usb_ports[] = {
 	{ 1, 0, 0 },
 	{ 1, 0, 0 },

src/mainboard/asus/maximus_iv_gene-z/romstage.c

@@ -40,10 +40,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
 	{ 1, 0, 6 },
 };
 
-void pch_enable_lpc(void)
-{
-}
-
 void mainboard_config_superio(void)
 {
 	static const pnp_devfn_t GLOBAL_PSEUDO_DEV = PNP_DEV(0x2e, 0);

src/mainboard/asus/p8h61-m_lx/romstage.c

@@ -41,7 +41,7 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
 	{ 1, 0, 6 },
 };
 
-void pch_enable_lpc(void)
+void mainboard_pch_lpc_setup(void)
 {
 	pci_or_config16(PCH_LPC_DEV, LPC_EN,
 			CNF1_LPC_EN | KBC_LPC_EN | LPT_LPC_EN | COMA_LPC_EN);

src/mainboard/asus/p8h61-m_pro/romstage.c

@@ -25,7 +25,7 @@
 #define SERIAL_DEV PNP_DEV(0x2e, NCT6776_SP1)
 #define ACPI_DEV PNP_DEV(0x2e, NCT6776_ACPI)
 
-void pch_enable_lpc(void)
+void mainboard_pch_lpc_setup(void)
 {
 	/* Enable the Super IO */
 	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN |

src/mainboard/asus/p8z77-m_pro/romstage.c

@@ -30,10 +30,6 @@
 #define GLOBAL_DEV PNP_DEV(0x2e, 0)
 #define SERIAL_DEV PNP_DEV(0x2e, NCT6779D_SP2)
 
-void pch_enable_lpc(void)
-{
-}
-
 const struct southbridge_usb_port mainboard_usb_ports[] = {
 	/* {enable, current, oc_pin} */
 	{ 1, 2, 0 }, /* Port 0: USB3 front internal header, top */