coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3
a long time ago. This will make it easier to port v2 boards forward to v3 at some point (and other things) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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committed by
Stefan Reinauer
parent
3c924d2f48
commit
2b34db8d1d
@@ -105,24 +105,24 @@ static void get_ide_dma66()
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byte =
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pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary,
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sm_dev->path.u.pci.devfn, 0xA9);
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sm_dev->path.pci.devfn, 0xA9);
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byte |= (1 << 5); /* Set Gpio9 as input */
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pci_cf8_conf1.write8(&pbus, sm_dev->bus->secondary,
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sm_dev->path.u.pci.devfn, 0xA9, byte);
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sm_dev->path.pci.devfn, 0xA9, byte);
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ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1));
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byte =
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pci_cf8_conf1.read8(&pbus, ide_dev->bus->secondary,
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ide_dev->path.u.pci.devfn, 0x56);
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ide_dev->path.pci.devfn, 0x56);
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byte &= ~(7 << 0);
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if ((1 << 5) & pci_cf8_conf1.
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read8(&pbus, sm_dev->bus->secondary, sm_dev->path.u.pci.devfn,
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read8(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn,
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0xAA))
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byte |= 2 << 0; /* mode 2 */
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else
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byte |= 5 << 0; /* mode 5 */
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pci_cf8_conf1.write8(&pbus, ide_dev->bus->secondary,
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ide_dev->path.u.pci.devfn, 0x56, byte);
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ide_dev->path.pci.devfn, 0x56, byte);
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}
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/*
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@@ -158,10 +158,10 @@ static void set_thermal_config()
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sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
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word =
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pci_cf8_conf1.read16(&pbus, sm_dev->bus->secondary,
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sm_dev->path.u.pci.devfn, 0x56);
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sm_dev->path.pci.devfn, 0x56);
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word |= 1 << 7;
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pci_cf8_conf1.write16(&pbus, sm_dev->bus->secondary,
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sm_dev->path.u.pci.devfn, 0x56, word);
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sm_dev->path.pci.devfn, 0x56, word);
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/* set GPIO 64 internal pull-up */
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byte = pm2_ioread(0xf0);
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