soc/intel/skylake: Add USB Port Over Current (OC) Pin programming
Program USB Overcurrent pins as per board schematics definition. BUG=none BRANCH=none TEST=Build and boot kunimitsu from USB device. Change-Id: I6aeb65953c753e09ad639469de7d866a54f42f11 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/17570 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
committed by
Martin Roth
parent
2c6a8060da
commit
2c3054c14e
@@ -121,6 +121,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
|
||||
for (i = 0; i < ARRAY_SIZE(config->usb2_ports); i++) {
|
||||
params->PortUsb20Enable[i] =
|
||||
config->usb2_ports[i].enable;
|
||||
params->Usb2OverCurrentPin[i] =
|
||||
config->usb2_ports[i].ocpin;
|
||||
params->Usb2AfePetxiset[i] =
|
||||
config->usb2_ports[i].pre_emp_bias;
|
||||
params->Usb2AfeTxiset[i] =
|
||||
@@ -133,6 +135,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(config->usb3_ports); i++) {
|
||||
params->PortUsb30Enable[i] = config->usb3_ports[i].enable;
|
||||
params->Usb3OverCurrentPin[i] = config->usb3_ports[i].ocpin;
|
||||
if (config->usb3_ports[i].tx_de_emp) {
|
||||
params->Usb3HsioTxDeEmphEnable[i] = 1;
|
||||
params->Usb3HsioTxDeEmph[i] =
|
||||
|
Reference in New Issue
Block a user