cpu/intel: Make all Intel CPUs load microcode from CBFS
The sequence to inject microcode updates is virtually the same for all Intel CPUs. The same function is used to inject the update in both CBFS and hardcoded cases, and in both of these cases, the microcode resides in the ROM. This should be a safe change across the board. The function which loaded compiled-in microcode is also removed here in order to prevent it from being used in the future. The dummy terminators from microcode need to be removed if this change is to work when generating microcode from several microcode_blob.c files, as is the case for older socketed CPUs. Removal of dummy terminators is done in a subsequent patch. Change-Id: I2cc8220cc4cd4a87aa7fc750e6c60ccdfa9986e9 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4495 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
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@ -1,3 +1,4 @@
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config CPU_INTEL_MODEL_6XX
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bool
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select SMP
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select SUPPORT_CPU_UCODE_IN_CBFS
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@ -1 +1,3 @@
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ramstage-y += model_6xx_init.c
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cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
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33
src/cpu/intel/model_6xx/microcode_blob.c
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33
src/cpu/intel/model_6xx/microcode_blob.c
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@ -0,0 +1,33 @@
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unsigned microcode_updates_6xx[] = {
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/* WARNING - Intel has a new data structure that has variable length
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* microcode update lengths. They are encoded in int 8 and 9. A
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* dummy header of nulls must terminate the list.
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*/
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#include "microcode-99-B_c6_612.h"
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#include "microcode-43-B_c6_617.h"
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#include "microcode-51-B_c6_616.h"
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#include "microcode-153-d2_619.h"
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#include "microcode-308-MU163336.h"
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#include "microcode-309-MU163437.h"
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#include "microcode-358-MU166d05.h"
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#include "microcode-359-MU166d06.h"
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#include "microcode-386-MU16600a.h"
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#include "microcode-398-MU166503.h"
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#include "microcode-399-MU166a0b.h"
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#include "microcode-400-MU166a0c.h"
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#include "microcode-401-MU166a0d.h"
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#include "microcode-402-MU166d07.h"
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#include "microcode-566-mu26a003.h"
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#include "microcode-588-mu26a101.h"
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#include "microcode-620-MU26a401.h"
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/* Dummy terminator */
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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};
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@ -9,40 +9,6 @@
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#include <cpu/intel/microcode.h>
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#include <cpu/x86/cache.h>
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static uint32_t microcode_updates[] = {
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/* WARNING - Intel has a new data structure that has variable length
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* microcode update lengths. They are encoded in int 8 and 9. A
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* dummy header of nulls must terminate the list.
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*/
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#include "microcode-99-B_c6_612.h"
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#include "microcode-43-B_c6_617.h"
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#include "microcode-51-B_c6_616.h"
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#include "microcode-153-d2_619.h"
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#include "microcode-308-MU163336.h"
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#include "microcode-309-MU163437.h"
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#include "microcode-358-MU166d05.h"
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#include "microcode-359-MU166d06.h"
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#include "microcode-386-MU16600a.h"
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#include "microcode-398-MU166503.h"
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#include "microcode-399-MU166a0b.h"
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#include "microcode-400-MU166a0c.h"
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#include "microcode-401-MU166a0d.h"
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#include "microcode-402-MU166d07.h"
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#include "microcode-566-mu26a003.h"
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#include "microcode-588-mu26a101.h"
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#include "microcode-620-MU26a401.h"
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/* Dummy terminator */
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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};
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static void model_6xx_init(device_t dev)
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{
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/* Turn on caching if we haven't already */
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@ -51,7 +17,7 @@ static void model_6xx_init(device_t dev)
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x86_mtrr_check();
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/* Update the microcode */
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intel_update_microcode(microcode_updates);
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intel_update_microcode_from_cbfs();
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/* Enable the local cpu apics */
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setup_lapic();
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