soc/intel/braswell: Correct serial IRQ support

Serial IRQ was configured in quiet mode, but not enabled.
Enable serial IRQ and use 'enum seriirq_mode' as a devicetree
option.

Function sc_enable_serial_irqs() is added to enabled serial IRQs.
enable_serirq_quiet_mode() is renamed to
sc_set_serial_irqs_mode(). This function use the 'serirq_mode' to
set the mode. The call to this function is moved from finalize to init
having serial IRQs enable in early stage.

Serial IRQs must be enabled in continuous mode for at least one frame
before switching into quiet mode.

BUG=N/A
TEST=Portwell PQ7-M107

Change-Id: I7844cad69dc0563fa6109d779d0afb7c2edd7245
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29398
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Frans Hendriks
2019-04-02 15:06:29 +02:00
committed by Patrick Georgi
parent e8fb3dfa6c
commit 2c63017ca3
3 changed files with 38 additions and 10 deletions

View File

@@ -3,6 +3,7 @@
*
* Copyright (C) 2013 Google Inc.
* Copyright (C) 2015 Intel Corp.
* Copyright (C) 2019 Eltan B.V.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -24,6 +25,7 @@
#include <stdint.h>
#include <fsp/util.h>
#include <intelblocks/lpc_lib.h>
#include <soc/pci_devs.h>
#define SVID_CONFIG1 1
@@ -54,6 +56,8 @@ struct soc_intel_braswell_config {
uint8_t enable_xdp_tap;
uint8_t clkreq_enable;
enum serirq_mode serirq_mode;
/* Disable SLP_X stretching after SUS power well loss. */
int disable_slp_x_stretch_sus_fail;