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AMD Torpedo platform updates

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This update fixes warnings and supports as necessary
the Agesa infrastructure changes required to support
the AMD Family 14 cpu update to rev C0.

Change-Id: Ib08b49695b925b81f796bf299141fe6f845fdef8
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/138
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
This commit is contained in:
efdesign98
2011-08-19 14:25:48 -06:00
committed by Marc Jones
parent 4d2d5d5b3e
commit 2c66060169
5 changed files with 41 additions and 72 deletions
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21
src/mainboard/amd/torpedo/BiosCallOuts.c
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@@ -539,25 +539,30 @@ AGESA_STATUS BiosHookBeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
Data16 |= Data8;
AcpiMmioAddr = (UINT32)Data16 << 16;
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
if(MemData->ParameterListPtr->DDR3Voltage == VOLT1_5) {
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
Data8 |= BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
} else if(MemData->ParameterListPtr->DDR3Voltage == VOLT1_35) {
switch(MemData->ParameterListPtr->DDR3Voltage){
case VOLT1_35:
Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
Data8 |= BIT6;
Data8 |= (UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
} else if(MemData->ParameterListPtr->DDR3Voltage == VOLT1_25) {
break;
case VOLT1_25:
Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
} else {}
break;
case VOLT1_5:
default:
Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
Data8 |= (UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
}
return Status;
}