{arch,cpu,drivers,ec}: Don't hide pointers behind typedefs

Change-Id: Id88bb4367d6045f6fbf185f0562ac72c04ee5f84
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: http://review.coreboot.org/7146
Tested-by: build bot (Jenkins)

src/cpu/allwinner/a10/cpu.c

@@ -11,7 +11,7 @@
 #include <cbmem.h>
 
 
-static void cpu_enable_resources(device_t dev)
+static void cpu_enable_resources(struct device *dev)
 {
 	ram_resource(dev, 0, CONFIG_SYS_SDRAM_BASE >> 10,
 		     CONFIG_DRAM_SIZE_MB << 10);
@@ -20,12 +20,12 @@ static void cpu_enable_resources(device_t dev)
 	 */
 }
 
-static void cpu_init(device_t dev)
+static void cpu_init(struct device *dev)
 {
 	/* TODO: Check if anything else needs to be explicitly initialized */
 }
 
-static void cpu_noop(device_t dev)
+static void cpu_noop(struct device *dev)
 {
 }
 
@@ -37,7 +37,7 @@ static struct device_operations cpu_ops = {
 	.scan_bus         = NULL,
 };
 
-static void a1x_cpu_enable_dev(device_t dev)
+static void a1x_cpu_enable_dev(struct device *dev)
 {
 	dev->ops = &cpu_ops;
 }

src/cpu/intel/ep80579/ep80579_init.c

@@ -28,7 +28,7 @@
 #include <cpu/x86/cache.h>
 #include <cpu/x86/mtrr.h>
 
-static void ep80579_init(device_t dev)
+static void ep80579_init(struct device *dev)
 {
 	/* Turn on caching if we haven't already */
 	x86_enable_cache();

src/cpu/intel/fsp_model_206ax/acpi.c

@@ -89,7 +89,7 @@ static int generate_C_state_entries(void)
 	struct cpu_info *info;
 	struct cpu_driver *cpu;
 	int len, lenif;
-	device_t lapic;
+	struct device *lapic;
 	struct cpu_intel_fsp_model_206ax_config *conf = NULL;
 
 	/* Find the SpeedStep CPU in the device tree using magic APIC ID */

src/cpu/intel/fsp_model_206ax/model_206ax_init.c

@@ -290,7 +290,7 @@ static void configure_mca(void)
 /*
  * Initialize any extra cores/threads in this package.
  */
-static void intel_cores_init(device_t cpu)
+static void intel_cores_init(struct device *cpu)
 {
 	struct cpuid_result result;
 	unsigned threads_per_package, threads_per_core, i;
@@ -313,7 +313,7 @@ static void intel_cores_init(device_t cpu)
 
 	for (i = 1; i < threads_per_package; ++i) {
 		struct device_path cpu_path;
-		device_t new;
+		struct device *new;
 
 		/* Build the cpu device path */
 		cpu_path.type = DEVICE_PATH_APIC;
@@ -344,7 +344,7 @@ static void intel_cores_init(device_t cpu)
 	}
 }
 
-static void model_206ax_init(device_t cpu)
+static void model_206ax_init(struct device *cpu)
 {
 	char processor_name[49];
 	struct cpuid_result cpuid_regs;

src/cpu/intel/fsp_model_406dx/acpi.c

@@ -55,7 +55,7 @@ static int generate_C_state_entries(void)
 	struct cpu_info *info;
 	struct cpu_driver *cpu;
 	int len, lenif;
-	device_t lapic;
+	struct device *lapic;
 	struct cpu_intel_model_406dx_config *conf = NULL;
 
 	/* Find the SpeedStep CPU in the device tree using magic APIC ID */

src/cpu/intel/fsp_model_406dx/model_406dx_init.c

@@ -112,7 +112,7 @@ static void configure_mca(void)
 /*
  * Initialize any extra cores/threads in this package.
  */
-static void intel_cores_init(device_t cpu)
+static void intel_cores_init(struct device *cpu)
 {
 	struct cpuid_result result;
 	unsigned threads_per_package, threads_per_core, i;
@@ -135,7 +135,7 @@ static void intel_cores_init(device_t cpu)
 
 	for (i = 1; i < threads_per_package; ++i) {
 		struct device_path cpu_path;
-		device_t new;
+		struct device *new;
 
 		/* Build the cpu device path */
 		cpu_path.type = DEVICE_PATH_APIC;
@@ -166,7 +166,7 @@ static void intel_cores_init(device_t cpu)
 	}
 }
 
-static void model_406dx_init(device_t cpu)
+static void model_406dx_init(struct device *cpu)
 {
 	char processor_name[49];
 

src/cpu/intel/haswell/acpi.c

@@ -91,7 +91,7 @@ static int generate_C_state_entries(void)
 	struct cpu_info *info;
 	struct cpu_driver *cpu;
 	int len, lenif;
-	device_t lapic;
+	struct device *lapic;
 	struct cpu_intel_haswell_config *conf = NULL;
 
 	/* Find the SpeedStep CPU in the device tree using magic APIC ID */

src/cpu/intel/haswell/haswell_init.c

@@ -597,7 +597,7 @@ static void configure_c_states(void)
 static void configure_thermal_target(void)
 {
 	struct cpu_intel_haswell_config *conf;
-	device_t lapic;
+	struct device *lapic;
 	msr_t msr;
 
 	/* Find pointer to CPU configuration */
@@ -735,7 +735,7 @@ static void bsp_init_before_ap_bringup(struct bus *cpu_bus)
 }
 
 /* All CPUs including BSP will run the following function. */
-static void haswell_init(device_t cpu)
+static void haswell_init(struct device *cpu)
 {
 	/* Clear out pending MCEs */
 	configure_mca();

src/cpu/intel/haswell/smmrelocate.c

@@ -227,7 +227,7 @@ static void asmlinkage cpu_smm_do_relocation(void *arg)
 	}
 }
 
-static u32 northbridge_get_base_reg(device_t dev, int reg)
+static u32 northbridge_get_base_reg(struct device *dev, int reg)
 {
 	u32 value;
 
@@ -237,7 +237,7 @@ static u32 northbridge_get_base_reg(device_t dev, int reg)
 	return value;
 }
 
-static void fill_in_relocation_params(device_t dev,
+static void fill_in_relocation_params(struct device *dev,
                                       struct smm_relocation_params *params)
 {
 	u32 tseg_size;
@@ -387,7 +387,7 @@ static int install_permanent_handler(int num_cpus,
 
 static int cpu_smm_setup(void)
 {
-	device_t dev;
+	struct device *dev;
 	int num_cpus;
 	msr_t msr;
 

src/cpu/intel/hyperthreading/intel_sibling.c

@@ -38,7 +38,7 @@ int intel_ht_sibling(void)
 	return !!(lapicid() & (threads-1));
 }
 
-void intel_sibling_init(device_t cpu)
+void intel_sibling_init(struct device *cpu)
 {
 	unsigned i, siblings;
 	struct cpuid_result result;
@@ -74,7 +74,7 @@ void intel_sibling_init(device_t cpu)
 	/* I am the primary cpu start up my siblings */
 	for(i = 1; i < siblings; i++) {
 		struct device_path cpu_path;
-		device_t new;
+		struct device *new;
 		/* Build the cpu device path */
 		cpu_path.type = DEVICE_PATH_APIC;
 		cpu_path.apic.apic_id = cpu->path.apic.apic_id + i;

src/cpu/intel/model_1067x/model_1067x_init.c

@@ -86,7 +86,7 @@ static void configure_c_states(const int quad)
 	msr_t msr;
 
 	/* Find pointer to CPU configuration. */
-	const device_t lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC);
+	const struct device *lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC);
 	const struct cpu_intel_model_1067x_config *const conf =
 		(lapic && lapic->chip_info) ? lapic->chip_info : NULL;
 
@@ -144,7 +144,7 @@ static void configure_p_states(const char stepping, const char cores)
 	msr_t msr;
 
 	/* Find pointer to CPU configuration. */
-	const device_t lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC);
+	const struct device *lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC);
 	struct cpu_intel_model_1067x_config *const conf =
 		(lapic && lapic->chip_info) ? lapic->chip_info : NULL;
 
@@ -285,7 +285,7 @@ static void configure_pic_thermal_sensors(const int tm2, const int quad)
 	wrmsr(PIC_SENS_CFG, msr);
 }
 
-static void model_1067x_init(device_t cpu)
+static void model_1067x_init(struct device *cpu)
 {
 	char processor_name[49];
 

src/cpu/intel/model_106cx/model_106cx_init.c

@@ -110,7 +110,7 @@ static void configure_misc(void)
 	wrmsr(IA32_MISC_ENABLE, msr);
 }
 
-static void model_106cx_init(device_t cpu)
+static void model_106cx_init(struct device *cpu)
 {
 	char processor_name[49];
 

src/cpu/intel/model_2065x/acpi.c

@@ -89,7 +89,7 @@ static int generate_C_state_entries(void)
 	struct cpu_info *info;
 	struct cpu_driver *cpu;
 	int len, lenif;
-	device_t lapic;
+	struct device *lapic;
 	struct cpu_intel_model_2065x_config *conf = NULL;
 
 	/* Find the SpeedStep CPU in the device tree using magic APIC ID */

src/cpu/intel/model_2065x/model_2065x_init.c

@@ -182,7 +182,7 @@ int cpu_config_tdp_levels(void)
 static void configure_thermal_target(void)
 {
 	struct cpu_intel_model_2065x_config *conf;
-	device_t lapic;
+	struct device *lapic;
 	msr_t msr;
 
 	/* Find pointer to CPU configuration */
@@ -286,7 +286,7 @@ static void configure_mca(void)
 /*
  * Initialize any extra cores/threads in this package.
  */
-static void intel_cores_init(device_t cpu)
+static void intel_cores_init(struct device *cpu)
 {
 	struct cpuid_result result;
 	unsigned threads_per_package, threads_per_core, i;
@@ -309,7 +309,7 @@ static void intel_cores_init(device_t cpu)
 
 	for (i = 1; i < threads_per_package; ++i) {
 		struct device_path cpu_path;
-		device_t new;
+		struct device *new;
 
 		/* Build the cpu device path */
 		cpu_path.type = DEVICE_PATH_APIC;
@@ -337,7 +337,7 @@ static void intel_cores_init(device_t cpu)
 	}
 }
 
-static void model_2065x_init(device_t cpu)
+static void model_2065x_init(struct device *cpu)
 {
 	char processor_name[49];
 	struct cpuid_result cpuid_regs;

src/cpu/intel/model_206ax/acpi.c

@@ -89,7 +89,7 @@ static int generate_C_state_entries(void)
 	struct cpu_info *info;
 	struct cpu_driver *cpu;
 	int len, lenif;
-	device_t lapic;
+	struct device *lapic;
 	struct cpu_intel_model_206ax_config *conf = NULL;
 
 	/* Find the SpeedStep CPU in the device tree using magic APIC ID */

src/cpu/intel/model_206ax/model_206ax_init.c

@@ -364,7 +364,7 @@ static void configure_c_states(void)
 static void configure_thermal_target(void)
 {
 	struct cpu_intel_model_206ax_config *conf;
-	device_t lapic;
+	struct device *lapic;
 	msr_t msr;
 
 	/* Find pointer to CPU configuration */
@@ -477,7 +477,7 @@ static void configure_mca(void)
 /*
  * Initialize any extra cores/threads in this package.
  */
-static void intel_cores_init(device_t cpu)
+static void intel_cores_init(struct device *cpu)
 {
 	struct cpuid_result result;
 	unsigned threads_per_package, threads_per_core, i;
@@ -500,7 +500,7 @@ static void intel_cores_init(device_t cpu)
 
 	for (i = 1; i < threads_per_package; ++i) {
 		struct device_path cpu_path;
-		device_t new;
+		struct device *new;
 
 		/* Build the cpu device path */
 		cpu_path.type = DEVICE_PATH_APIC;
@@ -531,7 +531,7 @@ static void intel_cores_init(device_t cpu)
 	}
 }
 
-static void model_206ax_init(device_t cpu)
+static void model_206ax_init(struct device *cpu)
 {
 	char processor_name[49];
 	struct cpuid_result cpuid_regs;

src/cpu/intel/model_65x/model_65x_init.c

@@ -28,7 +28,7 @@
 #include <cpu/x86/cache.h>
 #include <cpu/intel/l2_cache.h>
 
-static void model_65x_init(device_t dev)
+static void model_65x_init(struct device *dev)
 {
 	/* Update the microcode */
 	intel_update_microcode_from_cbfs();

src/cpu/intel/model_67x/model_67x_init.c

@@ -29,7 +29,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/intel/l2_cache.h>
 
-static void model_67x_init(device_t cpu)
+static void model_67x_init(struct device *cpu)
 {
 	/* Update the microcode */
 	intel_update_microcode_from_cbfs();

src/cpu/intel/model_68x/model_68x_init.c

@@ -31,7 +31,7 @@
 #include <cpu/x86/cache.h>
 #include <cpu/x86/name.h>
 
-static void model_68x_init(device_t cpu)
+static void model_68x_init(struct device *cpu)
 {
 	char processor_name[49];
 

src/cpu/intel/model_69x/model_69x_init.c

@@ -8,7 +8,7 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
 
-static void model_69x_init(device_t dev)
+static void model_69x_init(struct device *dev)
 {
 	/* Turn on caching if we haven't already */
 	x86_enable_cache();

src/cpu/intel/model_6bx/model_6bx_init.c

@@ -31,7 +31,7 @@
 #include <cpu/x86/cache.h>
 #include <cpu/x86/name.h>
 
-static void model_6bx_init(device_t cpu)
+static void model_6bx_init(struct device *cpu)
 {
 	char processor_name[49];
 

src/cpu/intel/model_6dx/model_6dx_init.c

@@ -8,7 +8,7 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
 
-static void model_6dx_init(device_t dev)
+static void model_6dx_init(struct device *dev)
 {
 	/* Turn on caching if we haven't already */
 	x86_enable_cache();

src/cpu/intel/model_6ex/model_6ex_init.c

@@ -141,7 +141,7 @@ static void configure_pic_thermal_sensors(void)
 	wrmsr(PIC_SENS_CFG, msr);
 }
 
-static void model_6ex_init(device_t cpu)
+static void model_6ex_init(struct device *cpu)
 {
 	char processor_name[49];
 

src/cpu/intel/model_6fx/model_6fx_init.c

@@ -161,7 +161,7 @@ static void configure_pic_thermal_sensors(void)
 	wrmsr(PIC_SENS_CFG, msr);
 }
 
-static void model_6fx_init(device_t cpu)
+static void model_6fx_init(struct device *cpu)
 {
 	char processor_name[49];
 

src/cpu/intel/model_6xx/model_6xx_init.c

@@ -8,7 +8,7 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
 
-static void model_6xx_init(device_t dev)
+static void model_6xx_init(struct device *dev)
 {
 	/* Turn on caching if we haven't already */
 	x86_enable_cache();

src/cpu/intel/model_f0x/model_f0x_init.c

@@ -8,7 +8,7 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
 
-static void model_f0x_init(device_t dev)
+static void model_f0x_init(struct device *dev)
 {
 	/* Turn on caching if we haven't already */
 	x86_enable_cache();

src/cpu/intel/model_f1x/model_f1x_init.c

@@ -8,7 +8,7 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
 
-static void model_f1x_init(device_t dev)
+static void model_f1x_init(struct device *dev)
 {
 	/* Turn on caching if we haven't already */
 	x86_enable_cache();

src/cpu/intel/model_f2x/model_f2x_init.c

@@ -9,7 +9,7 @@
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
 
-static void model_f2x_init(device_t cpu)
+static void model_f2x_init(struct device *cpu)
 {
 	/* Turn on caching if we haven't already */
 	x86_enable_cache();

src/cpu/intel/model_f3x/model_f3x_init.c

@@ -9,7 +9,7 @@
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
 
-static void model_f3x_init(device_t cpu)
+static void model_f3x_init(struct device *cpu)
 {
 	/* Turn on caching if we haven't already */
 	x86_enable_cache();

src/cpu/intel/model_f4x/model_f4x_init.c

@@ -9,7 +9,7 @@
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
 
-static void model_f4x_init(device_t cpu)
+static void model_f4x_init(struct device *cpu)
 {
 	/* Turn on caching if we haven't already */
 	x86_enable_cache();

src/cpu/intel/speedstep/acpi.c

@@ -44,7 +44,7 @@ int __attribute__((weak)) get_cst_entries(acpi_cstate_t **entries
 
 static int determine_total_number_of_cores(void)
 {
-	device_t cpu;
+	struct device *cpu;
 	int count = 0;
 	for(cpu = all_devices; cpu; cpu = cpu->next) {
 		if ((cpu->path.type != DEVICE_PATH_APIC) ||

src/cpu/via/c3/c3_init.c

@@ -26,7 +26,7 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/cache.h>
 
-static void c3_init(device_t dev)
+static void c3_init(struct device *dev)
 {
 	x86_enable_cache();
 	x86_setup_mtrrs();

src/cpu/via/c7/c7_init.c

@@ -147,7 +147,7 @@ static void set_c7_speed(int model) {
 	printk(BIOS_INFO, "Current CPU multiplier: %dx\n", (int)((msr.lo >> 8) & 0xff));
 }
 
-static void c7_init(device_t dev)
+static void c7_init(struct device *dev)
 {
 	u8 brand;
 	struct cpuinfo_x86 c;

src/cpu/via/nano/nano_init.c

@@ -139,7 +139,7 @@ static void nano_power(void)
 	wrmsr(MSR_IA32_MISC_ENABLE, msr);
 }
 
-static void nano_init(device_t dev)
+static void nano_init(struct device *dev)
 {
 	struct cpuinfo_x86 c;
 

src/cpu/x86/lapic/lapic_cpu_init.c

@@ -253,7 +253,7 @@ static void *stacks[CONFIG_MAX_CPUS];
 volatile unsigned long secondary_stack;
 volatile unsigned int secondary_cpu_index;
 
-int start_cpu(device_t cpu)
+int start_cpu(struct device *cpu)
 {
 	struct cpu_info *info;
 	unsigned long stack_end;
@@ -430,9 +430,9 @@ void asmlinkage secondary_cpu_init(unsigned int index)
 	stop_this_cpu();
 }
 
-static void start_other_cpus(struct bus *cpu_bus, device_t bsp_cpu)
+static void start_other_cpus(struct bus *cpu_bus, struct device *bsp_cpu)
 {
-	device_t cpu;
+	struct device *cpu;
 	/* Loop through the cpus once getting them started */
 
 	for(cpu = cpu_bus->children; cpu ; cpu = cpu->sibling) {
@@ -465,7 +465,7 @@ static void start_other_cpus(struct bus *cpu_bus, device_t bsp_cpu)
 
 static void wait_other_cpus_stop(struct bus *cpu_bus)
 {
-	device_t cpu;
+	struct device *cpu;
 	int old_active_count, active_count;
 	long loopcount = 0;
 	int i;

src/cpu/x86/mp_init.c

@@ -86,7 +86,7 @@ struct mp_flight_plan {
 static struct mp_flight_plan mp_info;
 
 struct cpu_map {
-	device_t dev;
+	struct device *dev;
 	int apic_id;
 };
 
@@ -328,7 +328,7 @@ static int allocate_cpu_devices(struct bus *cpu_bus, struct mp_params *p)
 	info = cpu_info();
 	for (i = 1; i < max_cpus; i++) {
 		struct device_path cpu_path;
-		device_t new;
+		struct device *new;
 		int apic_id;
 
 		/* Build the cpu device path */