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soc/mediatek/mt8186: Add DEVAPC settings for ADSP

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Add DEVAPC permission settings for ADSP and set its domain number to 6.

TEST=SOF driver is functional.
BUG=b:204229221

Change-Id: I37bfea70386af953e89f3c38ac51e41af6aafa6e
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68290
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tinghan Shen
2022-10-04 13:37:56 +08:00
committed by Felix Held
parent a9e595770f
commit 2caa2fc56e
4 changed files with 151 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/soc/mediatek/common/include/soc/devapc_common.h
View File

@@ -36,6 +36,7 @@
#define FORBIDDEN5 FORBIDDEN4, FORBIDDEN
#define FORBIDDEN6 FORBIDDEN5, FORBIDDEN
#define FORBIDDEN7 FORBIDDEN6, FORBIDDEN
#define FORBIDDEN9 FORBIDDEN7, FORBIDDEN2
#define FORBIDDEN10 FORBIDDEN3, FORBIDDEN7
#define FORBIDDEN11 FORBIDDEN10, FORBIDDEN
#define FORBIDDEN12 FORBIDDEN11, FORBIDDEN

147
src/soc/mediatek/mt8186/devapc.c
View File

@@ -10,7 +10,7 @@ static const struct apc_infra_peri_dom_8 infra_ao_sys0_devices[] = {
/* 0 */
DAPC_INFRA_AO_SYS0_ATTR("INFRA_AO_TOPCKGEN",
NO_PROTECTION, FORBIDDEN3,
NO_PROTECTION, NO_PROTECTION, FORBIDDEN, NO_PROTECTION),
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION),
DAPC_INFRA_AO_SYS0_ATTR("INFRA_AO_INFRASYS_CONFIG_REGS",
NO_PROTECTION, NO_PROTECTION, FORBIDDEN, NO_PROTECTION,
FORBIDDEN, NO_PROTECTION, FORBIDDEN, FORBIDDEN),
@@ -40,7 +40,7 @@ static const struct apc_infra_peri_dom_8 infra_ao_sys0_devices[] = {
NO_PROTECTION, FORBIDDEN7),
DAPC_INFRA_AO_SYS0_ATTR("INFRA_AO_APMIXEDSYS",
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN,
NO_PROTECTION, NO_PROTECTION, FORBIDDEN, NO_PROTECTION),
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION),
DAPC_INFRA_AO_SYS0_ATTR("INFRA_AO_PMIC_WRAP",
NO_PROTECTION, NO_PROTECTION, FORBIDDEN3,
NO_PROTECTION, NO_PROTECTION, FORBIDDEN),
@@ -366,7 +366,7 @@ static const struct apc_infra_peri_dom_8 infra_ao_sys0_devices[] = {
/* 150 */
DAPC_INFRA_AO_SYS0_ATTR("PERISYS_AUDIODSP",
NO_PROTECTION, FORBIDDEN7),
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN),
};
/* module, AP permission, N/A, SSPM permission, N/A */
@@ -1183,6 +1183,88 @@ static const struct apc_infra_peri_dom_4 mm_ao_sys0_devices[] = {
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION),
};
static const struct apc_infra_peri_dom_16 adsp_ao_sys0_devices[] = {
/* 0 */
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_INFRA",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_INFRA_1",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_INFRA_2",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_EMI",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_AFE",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_AFE_1",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSP1",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSP1_1",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSP2",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSP2_1",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
/* 10 */
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_F_SRAM",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_H_SRAM",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSPCFG",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSPCKCTL",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DMA0_CFG",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSP_TIMER",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSP_UART",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_BUSMON_DRAM",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSPMBOX_0",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSPMBOX_1",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
/* 20 */
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSPMBOX_2",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSPMBOX_3",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSPMBOX_4",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DSPCFG_SEC",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_BUSMON_INFRA",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DMA1_CFG",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_RESERVED",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_BUSCFG",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_TMBIST",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_BCRM",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
/* 30 */
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_BUS_DEBUG",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_SYSCFG_AO",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_MASRC",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DAPC_AO",
SEC_RW_ONLY, FORBIDDEN15),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_K_BCRM",
NO_PROTECTION, FORBIDDEN5, NO_PROTECTION, FORBIDDEN9),
DAPC_AUD_AO_SYS0_ATTR("AUD_AO_DAPC",
SEC_RW_ONLY, FORBIDDEN15),
};
static const enum domain_id domain_map[] = {
DOMAIN_0, DOMAIN_1, DOMAIN_2, DOMAIN_3,
DOMAIN_4, DOMAIN_5, DOMAIN_6, DOMAIN_7,
@@ -1218,6 +1300,37 @@ static void set_mm_ao_apc(uintptr_t base)
mm_ao_sys0_devices[i].d_permission[j]);
}
#define AUD_DOMAIN_OFT 0x40
static void *adsp_getreg_domain(uintptr_t base, unsigned int offset,
enum domain_id domain_id, unsigned int index)
{
return (void *)(base + offset + domain_id * AUD_DOMAIN_OFT + index * IDX_OFT);
}
static void adsp_set_module_apc(uintptr_t base, uint32_t module, enum domain_id domain_id,
enum devapc_perm_type perm)
{
uint32_t apc_register_index;
uint32_t apc_set_index;
apc_register_index = module / MOD_NO_IN_1_DEVAPC;
apc_set_index = module % MOD_NO_IN_1_DEVAPC;
clrsetbits32(adsp_getreg_domain(base, 0, domain_id, apc_register_index),
0x3 << (apc_set_index * 2),
perm << (apc_set_index * 2));
}
static void set_adsp_ao_apc(uintptr_t base)
{
int i, j;
for (i = 0; i < ARRAY_SIZE(adsp_ao_sys0_devices); i++)
for (j = 0; j < ARRAY_SIZE(adsp_ao_sys0_devices[i].d_permission); j++)
adsp_set_module_apc(base + SYS0_D0_APC_0, i, domain_map[j],
adsp_ao_sys0_devices[i].d_permission[j]);
}
static void dump_infra_ao_apc(uintptr_t base)
{
int reg_max;
@@ -1248,6 +1361,24 @@ static void dump_mm_ao_apc(uintptr_t base)
read32(getreg(base, MAS_SEC_0)));
}
static void dump_adsp_ao_apc(uintptr_t base)
{
int reg_max;
unsigned int d, i;
reg_max = DIV_ROUND_UP(ARRAY_SIZE(adsp_ao_sys0_devices), MOD_NO_IN_1_DEVAPC);
for (d = 0; d < DOM_NUM_AUD_AO_SYS0; d++)
for (i = 0; i < reg_max; i++)
printk(BIOS_DEBUG, "[DEVAPC] (AUD_AO_SYS0)D%d_APC_%d: %#x\n", d, i,
read32(adsp_getreg_domain(base, SYS0_D0_APC_0, d, i)));
printk(BIOS_DEBUG, "[DEVAPC] (AUD_AO)MAS_0: %#x\n",
read32(getreg(base, AUD_DOM_0)));
printk(BIOS_DEBUG, "[DEVAPC] (AUD_AO)SEC_0: %#x\n",
read32(getreg(base, AUD_SEC_0)));
}
static void infra_init(uintptr_t base)
{
/* Side band */
@@ -1281,6 +1412,15 @@ static void mm_init(uintptr_t base)
TWO_BIT_DOM_REMAP_5, DOMAIN_2);
}
static void adsp_init(uintptr_t base)
{
set_adsp_ao_apc(base);
/* Master domain/secure */
SET32_BITFIELDS(getreg(base, AUD_DOM_0), ADSP_DOM, DOMAIN_6);
write32(getreg(base, AUD_SEC_0), 0);
}
struct devapc_init_ops {
uintptr_t base;
void (*init)(uintptr_t base);
@@ -1288,6 +1428,7 @@ struct devapc_init_ops {
} devapc_init[] = {
{ DEVAPC_AO_INFRA_PERI_BASE, infra_init, dump_infra_ao_apc },
{ DEVAPC_AO_MM_BASE, mm_init, dump_mm_ao_apc },
{ DEVAPC_AO_AUD_BASE, adsp_init, dump_adsp_ao_apc },
};
void dapc_init(void)

1
src/soc/mediatek/mt8186/include/soc/addressmap.h
View File

@@ -51,6 +51,7 @@ enum {
SSPM_SRAM_BASE = IO_PHYS + 0x00400000,
SSPM_CFG_BASE = IO_PHYS + 0x00440000,
AUDIODSP_BASE = IO_PHYS + 0x00680000,
DEVAPC_AO_AUD_BASE = IO_PHYS + 0x0069C000,
SFLASH_REG_BASE = IO_PHYS + 0x01000000,
AUXADC_BASE = IO_PHYS + 0x01001000,
UART0_BASE = IO_PHYS + 0x01002000,

5
src/soc/mediatek/mt8186/include/soc/devapc.h
View File

@@ -19,6 +19,8 @@ enum devapc_ao_offset {
MAS_DOM_3 = 0x0A0C,
MAS_SEC_0 = 0x0B00,
AO_APC_CON = 0x0F00,
AUD_DOM_0 = 0x0900,
AUD_SEC_0 = 0x0A00,
};
/******************************************************************************
@@ -39,6 +41,7 @@ struct apc_infra_peri_dom_4 {
enum devapc_sys_dom_num {
DOM_NUM_INFRA_AO_SYS0 = 8,
DOM_NUM_MM_AO_SYS0 = 4,
DOM_NUM_AUD_AO_SYS0 = 16,
};
enum devapc_cfg_index {
@@ -48,6 +51,7 @@ enum devapc_cfg_index {
/* PERM_ATTR MACRO */
#define DAPC_INFRA_AO_SYS0_ATTR(...) { { DAPC_PERM_ATTR_8(__VA_ARGS__) } }
#define DAPC_MM_AO_SYS0_ATTR(...) { { DAPC_PERM_ATTR_4(__VA_ARGS__) } }
#define DAPC_AUD_AO_SYS0_ATTR(...) { { DAPC_PERM_ATTR_16(__VA_ARGS__) } }
/******************************************************************************
* Variable DEFINITION
@@ -62,6 +66,7 @@ enum devapc_cfg_index {
DEFINE_BIT(SCP_SSPM_SEC, 21)
DEFINE_BITFIELD(SPM_DOM, 11, 8)
DEFINE_BITFIELD(SCP_DOM, 3, 0)
DEFINE_BITFIELD(ADSP_DOM, 3, 0)
/* Domain Remap */
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_0, 1, 0)