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drivers/intel/fsp2_0: Introduce fsp print helper macros

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This patch introduces fsp print helper macros to print
`efi_return_status_t' with the appropriate format. These macros
are now used for fsp debug prints with return status

efi_return_status_t is defined as UINT64 or UNIT32 based on the
selected architecture

BUG=b:329034258
TEST=Verified on Meteor Lake board (Rex)

Change-Id: If6342c4d40c76b702351070e424797c21138a4a9
Signed-off-by: Appukuttan V K <appukuttan.vk@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81630
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Appukuttan V K 2024-04-02 17:26:25 +05:30 committed by Felix Held
parent b55000b2d5
commit 2d89c78217
9 changed files with 48 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/drivers/intel/fsp2_0/debug.c
View File

@ -85,10 +85,10 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
printk(BIOS_SPEW, "\t%p: &hob_list_ptr\n", fsp_get_hob_list_ptr()); printk(BIOS_SPEW, "\t%p: &hob_list_ptr\n", fsp_get_hob_list_ptr());
} }
void fsp_debug_after_memory_init(uint32_t status) void fsp_debug_after_memory_init(efi_return_status_t status)
{ {
if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS)) if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_SPEW, "FspMemoryInit returned 0x%08x\n", status); fsp_printk(status, BIOS_SPEW, "FspMemoryInit");
if (status != FSP_SUCCESS) if (status != FSP_SUCCESS)
return; return;
@ -130,13 +130,13 @@ void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init,
printk(BIOS_SPEW, "\t%p: upd\n", fsps_new_upd); printk(BIOS_SPEW, "\t%p: upd\n", fsps_new_upd);
} }
void fsp_debug_after_silicon_init(uint32_t status) void fsp_debug_after_silicon_init(efi_return_status_t status)
{ {
if (CONFIG(CHECK_GPIO_CONFIG_CHANGES)) if (CONFIG(CHECK_GPIO_CONFIG_CHANGES))
fsp_gpio_config_check(AFTER_FSP_CALL, "FSP Silicon Init"); fsp_gpio_config_check(AFTER_FSP_CALL, "FSP Silicon Init");
if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS)) if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_SPEW, "FspSiliconInit returned 0x%08x\n", status); fsp_printk(status, BIOS_SPEW, "FspSiliconInit");
/* Display the HOBs */ /* Display the HOBs */
if (CONFIG(DISPLAY_HOBS)) if (CONFIG(DISPLAY_HOBS))
@ -164,13 +164,13 @@ void fsp_before_debug_notify(fsp_notify_fn notify,
printk(BIOS_SPEW, "\t%p: notify_params\n", notify_params); printk(BIOS_SPEW, "\t%p: notify_params\n", notify_params);
} }
void fsp_debug_after_notify(uint32_t status) void fsp_debug_after_notify(efi_return_status_t status)
{ {
if (CONFIG(CHECK_GPIO_CONFIG_CHANGES)) if (CONFIG(CHECK_GPIO_CONFIG_CHANGES))
fsp_gpio_config_check(AFTER_FSP_CALL, "FSP Notify"); fsp_gpio_config_check(AFTER_FSP_CALL, "FSP Notify");
if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS)) if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_SPEW, "FspNotify returned 0x%08x\n", status); fsp_printk(status, BIOS_SPEW, "FspNotify");
/* Display the HOBs */ /* Display the HOBs */
if (CONFIG(DISPLAY_HOBS)) if (CONFIG(DISPLAY_HOBS))

6
src/drivers/intel/fsp2_0/include/fsp/debug.h
View File

@ -19,14 +19,14 @@ enum fsp_log_level fsp_map_console_log_level(void);
void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init, void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
const FSPM_UPD *fspm_old_upd, const FSPM_UPD *fspm_old_upd,
const FSPM_UPD *fspm_new_upd); const FSPM_UPD *fspm_new_upd);
void fsp_debug_after_memory_init(uint32_t status); void fsp_debug_after_memory_init(efi_return_status_t status);
void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init, void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init,
const FSPS_UPD *fsps_old_upd, const FSPS_UPD *fsps_old_upd,
const FSPS_UPD *fsps_new_upd); const FSPS_UPD *fsps_new_upd);
void fsp_debug_after_silicon_init(uint32_t status); void fsp_debug_after_silicon_init(efi_return_status_t status);
void fsp_before_debug_notify(fsp_notify_fn notify, void fsp_before_debug_notify(fsp_notify_fn notify,
const struct fsp_notify_params *notify_params); const struct fsp_notify_params *notify_params);
void fsp_debug_after_notify(uint32_t status); void fsp_debug_after_notify(efi_return_status_t status);
void fspm_display_upd_values(const FSPM_UPD *old, void fspm_display_upd_values(const FSPM_UPD *old,
const FSPM_UPD *new); const FSPM_UPD *new);
void fsp_display_hobs(void); void fsp_display_hobs(void);

15
src/drivers/intel/fsp2_0/include/fsp/util.h
View File

@ -31,6 +31,17 @@ do { \
memcpy(dst, src, sizeof(src)); \ memcpy(dst, src, sizeof(src)); \
} while (0) } while (0)
/* Helper function to print a message concatenated with the a FSP return status. */
#if CONFIG(PLATFORM_USES_FSP2_X86_32)
#define FSP_STATUS_FMT "0x%08x"
#else
#define FSP_STATUS_FMT "0x%016llx"
#endif
#define fsp_printk(status, msg_level, fmt, ...) \
printk(msg_level, fmt ", status=" FSP_STATUS_FMT "\n", ##__VA_ARGS__, status)
#define fsp_die_with_post_code(status, postcode, fmt, ...) \
die_with_post_code(postcode, fmt ", status=" FSP_STATUS_FMT "\n", ##__VA_ARGS__, status)
struct hob_header { struct hob_header {
uint16_t type; uint16_t type;
uint16_t length; uint16_t length;
@ -187,10 +198,10 @@ enum cb_err fsp_load_component(struct fsp_load_descriptor *fspld, struct fsp_hea
* SoC. If the requested status is not a reboot status or unhandled, this * SoC. If the requested status is not a reboot status or unhandled, this
* function does nothing. * function does nothing.
*/ */
void fsp_handle_reset(uint32_t status); void fsp_handle_reset(efi_return_status_t status);
/* SoC/chipset must provide this to handle platform-specific reset codes */ /* SoC/chipset must provide this to handle platform-specific reset codes */
void chipset_handle_reset(uint32_t status); void chipset_handle_reset(efi_return_status_t status);
#if CONFIG(PLATFORM_USES_SECOND_FSP) #if CONFIG(PLATFORM_USES_SECOND_FSP)
/* The SoC must implement these to choose the appropriate FSP-M/FSP-S binary. */ /* The SoC must implement these to choose the appropriate FSP-M/FSP-S binary. */

12
src/drivers/intel/fsp2_0/memory_init.c
View File

@ -274,22 +274,22 @@ static uint32_t fsp_mrc_version(const struct fsp_header *hdr)
return ver; return ver;
} }
static void fspm_return_value_handler(const char *context, uint32_t status, bool die_on_error) static void fspm_return_value_handler(const char *context, efi_return_status_t status,
bool die_on_error)
{ {
if (status == FSP_SUCCESS) if (status == FSP_SUCCESS)
return; return;
fsp_handle_reset(status); fsp_handle_reset(status);
if (die_on_error) if (die_on_error)
die_with_post_code(POSTCODE_RAM_FAILURE, "%s returned with error 0x%zx!\n", fsp_die_with_post_code(status, POSTCODE_RAM_FAILURE, "%s error", context);
context, (size_t)status);
printk(BIOS_SPEW, "%s returned 0x%zx\n", context, (size_t)status); fsp_printk(status, BIOS_SPEW, "%s", context);
} }
static void fspm_multi_phase_init(const struct fsp_header *hdr) static void fspm_multi_phase_init(const struct fsp_header *hdr)
{ {
uint32_t status; efi_return_status_t status;
fsp_multi_phase_init_fn fsp_multi_phase_init; fsp_multi_phase_init_fn fsp_multi_phase_init;
struct fsp_multi_phase_params multi_phase_params; struct fsp_multi_phase_params multi_phase_params;
struct fsp_multi_phase_get_number_of_phases_params multi_phase_get_number; struct fsp_multi_phase_get_number_of_phases_params multi_phase_get_number;
@ -332,7 +332,7 @@ static void fspm_multi_phase_init(const struct fsp_header *hdr)
static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake) static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake)
{ {
uint32_t status; efi_return_status_t status;
fsp_memory_init_fn fsp_raminit; fsp_memory_init_fn fsp_raminit;
FSPM_UPD fspm_upd, *upd; FSPM_UPD fspm_upd, *upd;
FSPM_ARCHx_UPD *arch_upd; FSPM_ARCHx_UPD *arch_upd;

16
src/drivers/intel/fsp2_0/silicon_init.c
View File

@ -36,7 +36,8 @@ enum fsp_silicon_init_phases {
FSP_MULTI_PHASE_SI_INIT_EXECUTE_PHASE_API FSP_MULTI_PHASE_SI_INIT_EXECUTE_PHASE_API
}; };
static void fsps_return_value_handler(enum fsp_silicon_init_phases phases, uint32_t status) static void fsps_return_value_handler(enum fsp_silicon_init_phases phases,
efi_return_status_t status)
{ {
uint8_t postcode; uint8_t postcode;
@ -54,16 +55,13 @@ static void fsps_return_value_handler(enum fsp_silicon_init_phases phases, uint3
switch (phases) { switch (phases) {
case FSP_SILICON_INIT_API: case FSP_SILICON_INIT_API:
die_with_post_code(postcode, "FspSiliconInit returned with error 0x%08x\n", fsp_die_with_post_code(status, postcode, "FspSiliconInit error");
status);
break; break;
case FSP_MULTI_PHASE_SI_INIT_GET_NUMBER_OF_PHASES_API: case FSP_MULTI_PHASE_SI_INIT_GET_NUMBER_OF_PHASES_API:
printk(BIOS_SPEW, "FspMultiPhaseSiInit NumberOfPhases returned 0x%08x\n", fsp_printk(status, BIOS_SPEW, "FspMultiPhaseSiInit NumberOfPhases");
status);
break; break;
case FSP_MULTI_PHASE_SI_INIT_EXECUTE_PHASE_API: case FSP_MULTI_PHASE_SI_INIT_EXECUTE_PHASE_API:
printk(BIOS_SPEW, "FspMultiPhaseSiInit ExecutePhase returned 0x%08x\n", fsp_printk(status, BIOS_SPEW, "FspMultiPhaseSiInit ExecutePhase");
status);
break; break;
default: default:
break; break;
@ -88,7 +86,7 @@ static void do_silicon_init(struct fsp_header *hdr)
{ {
FSPS_UPD *upd, *supd; FSPS_UPD *upd, *supd;
fsp_silicon_init_fn silicon_init; fsp_silicon_init_fn silicon_init;
uint32_t status; efi_return_status_t status;
fsp_multi_phase_init_fn multi_phase_si_init; fsp_multi_phase_init_fn multi_phase_si_init;
struct fsp_multi_phase_params multi_phase_params; struct fsp_multi_phase_params multi_phase_params;
struct fsp_multi_phase_get_number_of_phases_params multi_phase_get_number; struct fsp_multi_phase_get_number_of_phases_params multi_phase_get_number;
@ -139,7 +137,7 @@ static void do_silicon_init(struct fsp_header *hdr)
status = silicon_init(upd); status = silicon_init(upd);
null_breakpoint_init(); null_breakpoint_init();
printk(BIOS_INFO, "FSPS returned %x\n", status); fsp_printk(status, BIOS_INFO, "FSPS");
timestamp_add_now(TS_FSP_SILICON_INIT_END); timestamp_add_now(TS_FSP_SILICON_INIT_END);
post_code(POSTCODE_FSP_SILICON_EXIT); post_code(POSTCODE_FSP_SILICON_EXIT);

6
src/drivers/intel/fsp2_0/util.c
View File

@ -83,18 +83,18 @@ enum cb_err fsp_validate_component(struct fsp_header *hdr, void *fsp_file, size_
return CB_SUCCESS; return CB_SUCCESS;
} }
static bool fsp_reset_requested(uint32_t status) static bool fsp_reset_requested(efi_return_status_t status)
{ {
return (status >= FSP_STATUS_RESET_REQUIRED_COLD && return (status >= FSP_STATUS_RESET_REQUIRED_COLD &&
status <= FSP_STATUS_RESET_REQUIRED_8); status <= FSP_STATUS_RESET_REQUIRED_8);
} }
void fsp_handle_reset(uint32_t status) void fsp_handle_reset(efi_return_status_t status)
{ {
if (!fsp_reset_requested(status)) if (!fsp_reset_requested(status))
return; return;
printk(BIOS_SPEW, "FSP: handling reset type %x\n", status); fsp_printk(status, BIOS_SPEW, "FSP: handling reset type");
switch (status) { switch (status) {
case FSP_STATUS_RESET_REQUIRED_COLD: case FSP_STATUS_RESET_REQUIRED_COLD:

6
src/include/efi/efi_datatype.h
View File

@ -65,7 +65,11 @@ typedef UINTN efi_uintn_t;
/* Signed value of native width. */ /* Signed value of native width. */
typedef INTN efi_intn_t; typedef INTN efi_intn_t;
/* Status codes common to all execution phases */ /* Status codes common to all execution phases */
typedef EFI_STATUS efi_return_status_t; #if CONFIG(PLATFORM_USES_FSP2_X86_32)
typedef UINT32 efi_return_status_t;
#else
typedef UINT64 efi_return_status_t;
#endif
/* Data structure for EFI_PHYSICAL_ADDRESS */ /* Data structure for EFI_PHYSICAL_ADDRESS */
typedef EFI_PHYSICAL_ADDRESS efi_physical_address; typedef EFI_PHYSICAL_ADDRESS efi_physical_address;
/* 128-bit buffer containing a unique identifier value */ /* 128-bit buffer containing a unique identifier value */

5
src/soc/amd/common/fsp/fsp_reset.c
View File

@ -6,10 +6,9 @@
#include <fsp/util.h> #include <fsp/util.h>
#include <stdint.h> #include <stdint.h>
void chipset_handle_reset(uint32_t status) void chipset_handle_reset(efi_return_status_t status)
{ {
printk(BIOS_ERR, "unexpected call to %s(0x%08x). Doing cold reset.\n", fsp_printk(status, BIOS_ERR, "Doing cold reset due to unexpected call to %s", __func__);
__func__, status);
BUG(); BUG();
do_cold_reset(); do_cold_reset();
} }

6
src/soc/intel/common/fsp_reset.c
View File

@ -30,20 +30,20 @@ struct fsp_reset_hob {
struct pch_reset_data reset_data; struct pch_reset_data reset_data;
}; };
void chipset_handle_reset(uint32_t status) void chipset_handle_reset(efi_return_status_t status)
{ {
if (status == CONFIG_FSP_STATUS_GLOBAL_RESET) { if (status == CONFIG_FSP_STATUS_GLOBAL_RESET) {
printk(BIOS_DEBUG, "GLOBAL RESET!\n"); printk(BIOS_DEBUG, "GLOBAL RESET!\n");
global_reset(); global_reset();
} }
printk(BIOS_ERR, "unhandled reset type %x\n", status); fsp_printk(status, BIOS_ERR, "unhandled reset type");
die("unknown reset type"); die("unknown reset type");
} }
static uint32_t fsp_reset_type_to_status(EFI_RESET_TYPE reset_type) static uint32_t fsp_reset_type_to_status(EFI_RESET_TYPE reset_type)
{ {
uint32_t status; efi_return_status_t status;
switch (reset_type) { switch (reset_type) {
case EfiResetCold: case EfiResetCold: