ddr3 spd: Rename read_spd_from_cbfs() to read_ddr3_spd_from_cbfs()

Since it checks for DDR3 style checksums, it's a more appropriate name.
Also make its configuration local for a future code move.

Change-Id: I417ae165579618d9215b8ca5f0500ff9a61af42f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/18264
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)

src/device/dram/spd_cache.c

@@ -22,13 +22,14 @@
 #include <string.h>
 
 #define SPD_SIZE	128
-#define SPD_CRC_HI	127
-#define SPD_CRC_LO	126
 
 _Static_assert(SPD_SIZE == CONFIG_DIMM_SPD_SIZE, "configured SPD sizes differ");
 
-int read_spd_from_cbfs(u8 *buf, int idx)
+int read_ddr3_spd_from_cbfs(u8 *buf, int idx)
 {
+	const int SPD_CRC_HI = 127;
+	const int SPD_CRC_LO = 126;
+
 	const char *spd_file;
 	size_t spd_file_len = 0;
 	size_t min_len = (idx + 1) * CONFIG_DIMM_SPD_SIZE;