soc/amd/cezanne: enable LPC decodes if platform uses LPC
Change-Id: I2473fe61b299d1c6221844cd744791b8012c5c67
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		@@ -21,6 +21,12 @@ static const struct soc_i2c_scl_pin i2c_scl_pins[] = {
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	I2C_RESET_SCL_PIN(I2C3_SCL_PIN, GPIO_I2C3_SCL),
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						I2C_RESET_SCL_PIN(I2C3_SCL_PIN, GPIO_I2C3_SCL),
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};
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					};
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					static void lpc_configure_decodes(void)
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					{
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						if (CONFIG(POST_IO) && (CONFIG_POST_IO_PORT == 0x80))
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							lpc_enable_port80();
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					}
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static void reset_i2c_peripherals(void)
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					static void reset_i2c_peripherals(void)
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{
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					{
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	const struct soc_amd_cezanne_config *cfg = config_of_soc();
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						const struct soc_amd_cezanne_config *cfg = config_of_soc();
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@@ -41,6 +47,9 @@ void fch_pre_init(void)
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	/* Setup SPI base by calling lpc_early_init before setting up eSPI. */
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						/* Setup SPI base by calling lpc_early_init before setting up eSPI. */
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	lpc_early_init();
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						lpc_early_init();
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						if (!CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
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							lpc_configure_decodes();
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	/* Setup eSPI to enable port80 routing if the board is using eSPI and the eSPI
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						/* Setup eSPI to enable port80 routing if the board is using eSPI and the eSPI
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	   interface hasn't already been set up in verstage on PSP */
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						   interface hasn't already been set up in verstage on PSP */
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	if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI) && !CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))
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						if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI) && !CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))
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