running out of flash
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1275 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -22,10 +22,10 @@ uses ROM_SIZE ROM_IMAGE_SIZE
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uses ROM_SECTION_SIZE
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uses ROM_SECTION_SIZE
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uses ROM_SECTION_OFFSET
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uses ROM_SECTION_OFFSET
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uses _RESET
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uses _RESET
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uses _EXCEPTION_VECTORS
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uses _ROMBASE
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uses _ROMBASE
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uses _RAMBASE
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uses _RAMBASE
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uses CACHE_RAM_BASE
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uses EMBEDDED_RAM_SIZE
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uses CACHE_RAM_SIZE
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uses STACK_SIZE HEAP_SIZE
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uses STACK_SIZE HEAP_SIZE
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## Enable PPC405 instructions
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## Enable PPC405 instructions
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@ -35,7 +35,7 @@ option CPU_OPT="-Wa,-m405"
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option CROSS_COMPILE="powerpc-eabi-"
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option CROSS_COMPILE="powerpc-eabi-"
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## Use chip configuration
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## Use chip configuration
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option CONFIG_CHIP_CONFIGURE=1
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#option CONFIG_CHIP_CONFIGURE=1
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## We don't use compressed image
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## We don't use compressed image
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option CONFIG_COMPRESS=0
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option CONFIG_COMPRESS=0
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@ -56,14 +56,12 @@ option IDE_OFFSET=0
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option ROM_SIZE=1048576
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option ROM_SIZE=1048576
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## Board has fixed size RAM
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option EMBEDDED_RAM_SIZE=128*1024*1024
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## LinuxBIOS C code runs at this location in RAM
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## LinuxBIOS C code runs at this location in RAM
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option _RAMBASE=0x00100000
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option _RAMBASE=0x00100000
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## For the trick of using cache as ram
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## put the fake ram location at this address
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option CACHE_RAM_BASE=0x00200000
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option CACHE_RAM_SIZE=0x00004000
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##
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##
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## Use a 64K stack
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## Use a 64K stack
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##
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##
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@ -89,8 +87,11 @@ romimage "normal"
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## Reset vector address
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## Reset vector address
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option _RESET=0xfffffffc
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option _RESET=0xfffffffc
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## Exception vectors
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option _EXCEPTION_VECTORS=0xfff00100
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## linuxBIOS ROM start address
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## linuxBIOS ROM start address
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option _ROMBASE=0xfff00000
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option _ROMBASE=0xfff03000
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## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
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## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
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option ROM_IMAGE_SIZE=49152
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option ROM_IMAGE_SIZE=49152
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