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cpu/intel/haswell: Link monotonic_timer.c in early stages

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This is needed for SPI flash console in bootblock/romstage/postcar.

Change-Id: I18253cc028e87cd31879d722a6d788917e9c97b3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33191
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Arthur Heymans
2019-06-04 10:42:24 +02:00
committed by Patrick Georgi
parent 09ccd418f4
commit 2ea1c9b29e
1 changed files with 3 additions and 0 deletions
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3
src/cpu/intel/haswell/Makefile.inc
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@@ -17,6 +17,9 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
ifneq ($(CONFIG_TSC_MONOTONIC_TIMER),y)
bootblock-y += monotonic_timer.c
romstage-y += monotonic_timer.c
postcar-y += monotonic_timer.c
ramstage-y += monotonic_timer.c
smm-y += monotonic_timer.c
endif