intel/gm45: new northbridge

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The code supports DDR3 boards only. RAM init for DDR2 is sufficiently
different that it requires separate code, and we have no boards to
test that.

Change-Id: I9076546faf8a2033c89eb95f5eec524439ab9fe1
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1689
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

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This commit is contained in:

Patrick Georgi

2012-11-06 11:03:53 +01:00

committed by Patrick Georgi

parent acd7d95251

commit 2efc8808b8

26 changed files with 5951 additions and 0 deletions

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src/northbridge/intel/gm45/raminit.c Normal file

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